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Finfet device and method of forming the same

A device and trapezoidal structure technology, applied in the field of FinFET devices and their formation, can solve the problems of difficult formation of semiconductor devices with interlayer interconnection structure, difficulty in removing residues, etc.

Active Publication Date: 2018-03-30
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] However, the formation method of the FinFET device in the prior art tends to leave residues on the fins, and the existence of these residues makes it difficult to form an interlayer interconnection structure on the semiconductor device
[0005] Further, as the dimensions of semiconductors continue to shrink, it becomes more difficult to remove these residues

Method used

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  • Finfet device and method of forming the same
  • Finfet device and method of forming the same
  • Finfet device and method of forming the same

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Embodiment Construction

[0046] The formation method of FinFET devices in the prior art is easy to form residues on the fins. In order to solve the technical problem, the existing process of forming FinFET devices is analyzed. The existing formation methods include: the method of etching on the substrate Forming strips of fins while at the same time performing "fin cuts" on the same plane in a direction relatively perpendicular to the strips of fins to separate the strips of fins into segments , each segment of the fin corresponds to an independent semiconductor device.

[0047] After "cutting", components such as gate, gate spacer, source region, and drain region will be formed on each segment of the fin. In the step of forming other components, impurities are easily formed between each segment of the strip fin.

[0048] For example, in the process of forming gate sidewalls, a layer of sidewall material is usually deposited on the fins, the gate and the substrate, and then only part of the sidewall ...

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Abstract

The invention provides a method for forming a FinFET device, comprising: providing a substrate, forming fins and gates on the substrate; forming sidewalls on the side walls of the gates; forming trenches in the fins between the gates ; Covering the substrate, the fins, the grid, and the side walls with an interlayer dielectric layer, and making the interlayer dielectric layer fill the trench. The present invention also provides a FinFET device, comprising: a substrate, a fin, and a groove separating the fin is formed on the fin, and the cross section of the groove is a trapezoidal structure with a large top and a small bottom; the side wall is formed with The side wall gate and the interlayer dielectric layer. The technical solution of the present invention has the following advantages: the possibility of leaving other impurities affecting the filling of the interlayer dielectric layer in the trench becomes very small, and the interlayer dielectric layer can be better filled in the trench in the slot.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to a FinFET device and a forming method thereof. Background technique [0002] In the prior art, compared with traditional planar structure transistors, Fin Field Effect Transistors (Fin Field Effect Transistors, FinFETs) not only have better gate control capabilities, but also can better suppress short-channel effects, making semiconductors The size of the device is further reduced. [0003] In the existing process of manufacturing FinFET devices, usually several fins (fin) are formed on the semiconductor substrate first, and gates, source regions, drain regions and other devices are formed on the fins, so as to form independent semiconductor devices. [0004] However, the conventional methods for forming FinFET devices tend to leave residues on the fins, and the existence of these residues makes it difficult to form an interlayer interconnection structure on the semiconductor device...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/336H01L29/78
Inventor 韩秋华
Owner SEMICON MFG INT (SHANGHAI) CORP