Method for reducing impedance mismatching degree under condition of discontinuous returning path

A technology of impedance mismatch and return path, applied in the direction of printed circuit, printed circuit, printed circuit components, etc., can solve the problems such as no high-speed signal solution, and achieve the effect of ensuring signal integrity and impedance continuity

Inactive Publication Date: 2015-07-22
FUZHOU ROCKCHIP SEMICON
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  • Description
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  • Application Information

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Problems solved by technology

However, it does not propose a solution when the impedance mismatch caused by

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  • Method for reducing impedance mismatching degree under condition of discontinuous returning path
  • Method for reducing impedance mismatching degree under condition of discontinuous returning path

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Embodiment Construction

[0014] As the support and communication platform of electronic components, PCB will change its form in the arrangement of components, the fixation of the whole machine circuit and the optimization of communication signals. see figure 1 As shown, when there is a slot on the bottom reference plane under the transmission line trace of the package and the PCB, it will cause a discontinuity of impedance, which will cause the differential mode impedance of the transmission line to increase at this point. The slotted line 2 of the underlying reference plane 1 introduces an impedance discontinuity. For differential signals, this impedance mismatch will appear as a differential-mode impedance mismatch.

[0015] By reducing the line distance of the transmission line above the slotted line, that is, the impedance discontinuity, the differential mode impedance at this position can be reduced, so that the differential mode impedance at this position can be as close as possible to the diff...

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Abstract

The invention provides a method for reducing an impedance mismatching degree under the condition of a discontinuous returning path. A grooving line is arranged on a reference plane of a bottom layer; a top layer is a signal layer with transmission lines; distances among the transmission lines on a portion above the grooving line are smaller than distances among the transmission lines of the rest portion; distances among differential signal lines of which the widths are 40 micrometers and the distances are 40 micrometers on a portion above the grooving line are changed into 32 micrometers from 40 micrometers; and specific numerical values of the distances among the transmission lines on the portion above the grooving line are handled through simulating software so as to obtain data in which impedance performance is improved optimally. The distances among the transmission lines on the portion above the grooving line, namely the transmission lines with discontinuous impedance, are reduced, so that differential mode impedance of the portion can be reduced and is close to differential mode impedance of lines at a position without the grooving line as much as possible. Specific reduced numerical values of the specific distances among the transmission lines need to be determined through simulation. Suitable parameters are selected through simulation so as to guarantee impedance continuity of the transmission lines, and signal integrity is guaranteed.

Description

【Technical field】 [0001] The invention relates to the technical field of circuit board manufacturing, in particular to a method for reducing the degree of impedance mismatch under the condition that the return path is discontinuous. 【Background technique】 [0002] As data transfer rates increase, signal integrity is critical for smooth data transfers. Every impedance mismatch in the high-speed signal path has the potential to generate signal jitter that affects signal quality. Due to the packaging and PCB design process, fewer layers are used to save costs, but this also causes the return path of some high-speed signal traces to be discontinuous. The impedance mismatch caused by the discontinuity of the return path is a key factor affecting the quality of high-speed signals. [0003] When there is a slot on the bottom reference plane below the transmission line trace of the package and the PCB, it will cause a discontinuity in the impedance, which will cause the differenti...

Claims

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Application Information

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IPC IPC(8): H05K1/02
CPCH05K1/025H05K2201/093
Inventor 史学良
Owner FUZHOU ROCKCHIP SEMICON
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