A kind of thin film transistor and its preparation method, array substrate, display device

Abstract

The embodiments of the present invention provide a thin film transistor and its preparation method, an array substrate, and a display device, which relate to the field of display technology and can increase the grain size, reduce the number of grain boundaries, reduce leakage current, and improve the electrical performance of TFT. The preparation method includes the step of forming a low-temperature polysilicon active layer; the base substrate has first and second regions; the step includes forming a buffer layer on the first and second regions of the base substrate, and the buffer layer corresponds to the first region The thickness is greater than the thickness corresponding to the second region; or, a buffer layer is formed on the first region of the base substrate; an amorphous silicon layer is formed on the buffer layer; the amorphous silicon layer is subjected to laser crystallization treatment to make the amorphous The silicon layer is converted into a polysilicon layer; the polysilicon layer on the second area is removed, and a low temperature polysilicon active layer is formed on the first area. It is used in the preparation of thin film transistors and array substrates including the thin film transistors.

Description

technical field [0001] The invention relates to the field of display technology, in particular to a thin film transistor and a preparation method thereof, an array substrate, and a display device. Background technique [0002] The traditional TFT (Thin Film Transistor, thin film transistor) uses amorphous silicon (a-Si) material as the active layer, and its carrier mobility is only 0.5cm 2 / V·s, it is difficult to meet the driving frequency requirements of large-size display devices. Although the carrier mobility of polycrystalline silicon (p-Si) material is significantly higher than that of amorphous silicon (a-Si), because the temperature of polycrystalline silicon preparation process is usually higher than 600 ℃, it is not suitable for the common glass substrate. For this reason, relevant technical personnel have developed a manufacturing process of a new generation of TFT-preparation of a low temperature polysilicon (Low Temperature Poly Silicon, LTPS for short) active...

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Problems solved by technology

Due to the small size of the LTPS grains obtained by the above preparation method, there are more grain boundaries corresponding to the LTPS in the channel, and the roughness at the grain boundaries is relatively large, and there are a large number of dangling bonds on the grain boundaries. , deformed bond (strained bond) defects, due to the existence of a large number of grain boundaries and defects in the channel, the TFT will produce defect-assisted tunneling and interband tunneling in the on state, resulting in an increase in the leakage current of the TFT and reducing the Stability of TFT electrical properties

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