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Microelectronic package plate with edge recesses for improved alignment

A technology for microelectronic packaging and packaging substrates, which is applied in the direction of circuits, electrical components, and electrical solid devices, and can solve problems such as solder ball placement offset and achieve the effect of improving rigidity

Inactive Publication Date: 2015-09-09
NVIDIA CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

When mounting solder balls, misalignment of the package substrate due to stiffener or heat sink overhang can lead to misalignment of solder ball placement off the pad

Method used

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  • Microelectronic package plate with edge recesses for improved alignment
  • Microelectronic package plate with edge recesses for improved alignment
  • Microelectronic package plate with edge recesses for improved alignment

Examples

Experimental program
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Embodiment Construction

[0016] figure 1 is a schematic cross-sectional view of a microelectronic package 100 in accordance with one embodiment of the present invention. As shown, microelectronic package 100 includes one or more integrated circuit (IC) chips 101 , package substrate 120 and board 130 . Microelectronic package 100 is configured to electrically and mechanically connect IC chip 101 and any other ICs mounted on package substrate 120 to a printed circuit board or other mounting substrate (not shown) external to microelectronic package 100 . In addition, microelectronic package 100 protects IC chip 101 from environmental humidity and other contamination, and minimizes mechanical shock and stress thereon.

[0017] The IC chip 101 is a semiconductor chip such as a central processing unit (CPU), a graphics processing unit (GPU), an application processor or other logic devices, a memory chip, a global positioning system (GPS) chip, a radio frequency (RF) transceiver chip, Wi-Fi - Fi chip, syst...

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PUM

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Abstract

A microelectronic package includes a package substrate with at least one semiconductor die mounted thereon and a plate coupled to the package substrate. The plate is configured with a first recess formed in a first edge of the plate and a second recess formed in a second edge of the plate wherein the first edge and the second edge are formed on opposing sides of the plate. One advantage of the above-described embodiments is that a stiffener plate or heat spreader that is sized to cover most or all of the periphery of a package substrate can be coupled to the package substrate without causing alignment issues in subsequent fabrication processes.

Description

technical field [0001] Embodiments of the present invention relate generally to integrated circuit chip packaging, and more particularly to microelectronic package boards having edge recesses for improved alignment. Background technique [0002] In the packaging of integrated circuits (ICs), it is common to include a stiffener or heat sink in the IC package to increase the mechanical rigidity of the package and / or to improve conduction from one or more IC chips contained in the package heat transfer. Both the stiffener and the heat sink are formed from metal plates coupled to a package substrate on which one or more ICs, capacitors and other devices are mounted. Accurate placement of the stiffener or heat sink on the package substrate is necessary to prevent "overhang," where the misalignment between the package substrate and the stiffener or heat sink is so great that One or more portions of the stiffener or heat sink extend beyond the edge of the package substrate. [0...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/13H01L23/34
CPCH01L23/3675H01L23/544H01L2223/54426H01L2223/54486H01L2924/0002H01L2924/00
Inventor 李英柱厄尼·奥品亚诺
Owner NVIDIA CORP