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Processor based on semi-custom register file and fault-tolerant method

A register file and register technology, applied to the redundancy in hardware for data error detection, machine execution device, response error generation, etc., can solve the possibility of not considering backup data" and insufficient mining of redundant hardware. Reliability improvement and other issues to achieve the effect of improving data reliability

Active Publication Date: 2015-10-21
NO 771 INST OF NO 9 RES INST CHINA AEROSPACE SCI & TECH
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This method does not consider the possibility of "error data" having correct "backup data" (in another SRAM), and does not fully exploit the reliability improvement brought by redundant hardware

Method used

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  • Processor based on semi-custom register file and fault-tolerant method
  • Processor based on semi-custom register file and fault-tolerant method
  • Processor based on semi-custom register file and fault-tolerant method

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Embodiment Construction

[0042] The present invention will be further described in detail below in conjunction with specific embodiments, which are explanations of the present invention rather than limitations.

[0043] In the example of the present invention, a five-stage pipeline processor is used as a preferred embodiment for illustration, and the processor fault-tolerant method based on the semi-custom register file proposed by the present invention is adopted, and the hardware circuit structure of its pipeline is as follows figure 2 As shown, the processor includes an instruction fetching module IF201, a decoding module ID202, an execution module EX203, a storage access module MA204, a write-back module WB205, a pipeline control module 207, an error correction module 208, a check code generation module 210 and Cross network register file 209 . Among them, the instruction fetching module IF201, the decoding module ID202, the execution module EX203, the storage access module MA204 and the write-ba...

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Abstract

The invention discloses a processor based on a semi-custom register file, which comprises a five-stage assembly line, an error detecting-and-correcting module, a crossover network register file and a check code generation module, wherein a processor fault-tolerant method comprises following steps: when an error that can be corrected occurs in datum of the register file, the assembly line is restarted to correct the error and related instructions are re-performed; when an error that can't not be corrected occurs in the datum of the register file, the assembly line is restarted to detect the backup datum of the error datum of the register file; if the backup datum are right, the subsequent processor processing is performed with the backup datum; if an error that can't be corrected also occurs in the backup datum, the processor will enter trap processing program; and the error is recovered by software. By a plurality of rollbacks and restarts of the assembly line, and the scheduling to an operand access address, the error that can be corrected is refreshed and the backup datum are polled correctly; and a data backup in rebundant hardware is dug out, thus the data reliability of the register file is improved.

Description

technical field [0001] The invention belongs to the field of microprocessor reliability, and relates to a pipeline fault-tolerant method at the architecture level of a processor, in particular to a processor based on a semi-customized register file and a fault-tolerant method thereof. Background technique [0002] According to the operating characteristics of the RISC instruction set, scalar and superscalar RISC processors usually only allocate three (two reads and one write) register file ports for a certain pipeline. Currently, there are mainly two ways to implement a three-port register file. The first is a full-custom design, which is difficult to design and takes a long period of time, and it is difficult for the front-end system designer to complete it independently. Another semi-custom design based on the cell library is to use the dual-port SRAM provided in the cell library to construct a three-port register file. This method is simple and easy to implement, and can...

Claims

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Application Information

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IPC IPC(8): G06F11/16G06F9/30
Inventor 陈庆宇吴龙胜
Owner NO 771 INST OF NO 9 RES INST CHINA AEROSPACE SCI & TECH
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