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Lookup table-based QC-LDPC serial encoder in CDR

A technology of serial encoder and lookup table, which is applied in the application of multi-bit parity error detection coding, data representation error detection/correction, error correction/detection using block code, etc., which can solve the problem of high power consumption, Problems such as high equipment cost, to achieve the effect of reducing hardware cost and power consumption, and reducing resource requirements

Inactive Publication Date: 2015-10-21
RONGCHENG DINGTONG ELECTRONICS INFORMATION SCI & TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

When implemented by hardware, more memory and registers are required, which will inevitably lead to high equipment cost and high power consumption

Method used

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  • Lookup table-based QC-LDPC serial encoder in CDR
  • Lookup table-based QC-LDPC serial encoder in CDR
  • Lookup table-based QC-LDPC serial encoder in CDR

Examples

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Embodiment Construction

[0015] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments, but not as a limitation of the present invention.

[0016] QC-LDPC code is a special kind of LDPC code. Its generator matrix G and check matrix H are both arrays composed of cyclic matrices, which have the characteristics of segmented cyclic, so they are called quasi-cyclic LDPC codes. From the point of view of rows, each row of the circulatory matrix is ​​the result of a cyclic right shift of the previous row (the first row is the last row); from the perspective of columns, each column of the circulatory matrix is ​​the previous column (the first row is the last row). column) the result of circularly shifting down one bit. The set of row vectors of a circulant matrix is ​​exactly the same as the set of column vectors. Therefore, a circulant matrix can be completely characterized by its first row or column. The generator matrix G of the QC-LDPC ...

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Abstract

The invention relates to a scheme of solving serial encoding of QC-LDPC codes of four different code rates in a CDR system, and is characterized in that a serial encoder of the QC-LDPC codes of the system mainly comprises four parts, i.e., a register, an index encoder, a lookup table and a b-bit two-input XOR gate. The QC-LDPC serial encoder provided by the invention is compatible with multiple code rates, can effectively reduce resource needs under the condition of keeping the encoding speed unchanged, and has the advantages of simple control, small resource consumption, small power consumption, low cost and the like.

Description

technical field [0001] The invention relates to the field of digital broadcasting, in particular to a serial realization method of a QC-LDPC code encoder in a CDR system. Background technique [0002] Since various distortions and noises in the transmission channel will interfere with the transmitted signal, bit errors in the digital signal will inevitably occur at the receiving end. In order to reduce the bit error rate, channel coding technology needs to be adopted. [0003] Low-Density Parity-Check (LDPC) codes have become a research hotspot in the field of channel coding because of their excellent performance of approaching the Shannon limit. The quasi-cyclic LDPC (Quasic-LDPC, QC-LDPC) code is a special LDPC code, and its encoding can be realized by using a shift register-adder-accumulator (Shift-Register-Adder-Accumulator, SRAA). [0004] The SRAA method uses the generator matrix G for encoding. The generator matrix G of the QC-LDPC code is composed of a×t b×b order...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M13/11
Inventor 张鹏
Owner RONGCHENG DINGTONG ELECTRONICS INFORMATION SCI & TECH CO LTD
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