Semiconductor memory device and method of fabricating the same

Abstract

Semiconductor memory devices and methods of fabricating the same are provided. A semiconductor memory device includes stack gate structures that are spaced apart from each other in a first direction horizontal to a substrate. Each of the stack gate structures includes insulating layers and gate electrodes alternately and repeatedly stacked on the substrate. Vertical channel structures penetrate the stack gate structures. A source plug line is provided between the stack gate structures. The source plug line is in contact with the substrate and extends in a second direction intersecting the first direction. The substrate being in contact with the source plug line includes a plurality of protruding regions formed along the second direction. Each of the protruding regions has a first width, and the protruding regions are spaced apart from each other by a first distance greater than the first width.

Description

[0001] Cross References to Related Applications [0002] This application claims priority from Korean Patent Application No. 10-2014-0053601 filed with the Korean Intellectual Property Office on May 2, 2014, the disclosure of which is incorporated herein by reference in its entirety. technical field [0003] The inventive concept relates to a semiconductor memory device and a method of manufacturing the same. More particularly, the inventive concepts relate to three-dimensional (3D) semiconductor memory devices and methods of manufacturing the same. Background technique [0004] Semiconductor devices are becoming more highly integrated to provide high performance and low cost. The integration density of a semiconductor memory device directly affects the cost of the semiconductor memory device, resulting in a demand for highly integrated semiconductor devices. The integration level of a conventional two-dimensional (2D) or planar memory device is mainly determined by the ar...

AI Technical Summary

Problems solved by technology

Therefore, techniques for forming fine patterns can greatly affect the integration density of conventional 2D memory devices

However, the integration density of 2D memory devices is still limited even though it continues to increase because extremely expensive equipment is required to form fine patterns.

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