ROM

Abstract

The invention discloses a read-only memory. The read-only memory comprises a unit array including word lines, bit lines and transistors connected with the word lines and the bit lines; and a charging circuit positioned outside the unit array, connected with a power supply end and the bit line, and used for charging the unit array on the bit line direction. The read-only memory solves the technical problem of slow ROM reading speed due to pre-charging in the prior art, so that technical effects that the ROM reading speed is accelerated, the size of a chip is not enlarged, and average effective current cannot be influenced are reached.

Description

technical field [0001] The present invention relates to the field of semiconductors, in particular to a read only memory (Read Only Memory, ROM). Background technique [0002] At present, the structure of the read-only memory (ROM) in the related art is as follows: figure 1 As shown, it includes transistors 102 to 110 and is connected to the output terminal DOUT through an inverter 112 . When the ROM is read, the bit line needs to be precharged, which causes errors in the first few cycles. In addition, due to the need to precharge each time, the ROM has a serious delay when performing the read operation. , resulting in slower reading of ROM. [0003] For the above problems, no effective solution has been proposed yet. Contents of the invention [0004] The embodiment of the present invention provides a read-only memory, which overcomes at least the technical problem in the prior art that the reading speed of the ROM is slow due to the need for precharging. [0005] Acc...

AI Technical Summary

Problems solved by technology

When the ROM is read, the bit line needs to be precharged, which causes errors in the first few cycles. In addition, due to the need to precharge each time, the ROM has a serious delay when performing the read operation. , resulting in slower reading of ROM

[0003] For the above problems, no effective solution has been proposed

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