A Synchronization Method for Software-Hardware Co-simulation

Abstract

The present invention discloses a synchronization method for software and hardware collaborative simulation. The method comprises writing specific data to a dummy address through a to-be-verified CPU; a bus functional module of a verification platform receiving related information; and a decoding module parsing a specific event of the data. A methodological callback is used to correspond with each event. When a chip verifier develops a test case, synchronization can be completed only by adding a code for triggering the CPU to write code to the dummy address, then inheriting a callback corresponding to the event in the methodology. According to the method provided by the present invention, a code execution status of the to-be-verified CPU can be real-time monitored; a real-time inspection is performed by synchronization; the method is applicable to a test case with a complex structure, and combines a callback of verification methodology; so that a programming burden of a verifier can be reduced.

Description

technical field [0001] The invention relates to the field of chip verification, in particular to a method for synchronizing software codes executed on a CPU to be verified and software and hardware co-simulation of a chip verification platform. Background technique [0002] In the current system-level verification, it is often necessary to execute software codes in the CPU to verify the functions and reliability of the system. For example, the CPU executes a specific code to complete the configuration of a certain function of the chip. When the verification personnel need to check whether the configuration set by the CPU is effective, they need to write specific code in the verification platform to check. Since the current verification method and platform cannot directly know the execution status of the CPU code, verification personnel cannot be informed and checked in time. The current common practice is to execute the software code on the CPU and record the waveform throu...

AI Technical Summary

Problems solved by technology

Since the current verification method and platform cannot directly know the execution status of the CPU code, the verification personnel cannot be informed and checked in time

The current common practice is to execute the software code on the CPU and record the waveform through the emulator to complete the inspection. The disadvantage of this method is that the recorded waveform needs to be manually inspected, which cannot be automated, and it takes a long time to record the waveform. do a lot of testing

Another popular solution is that in a test case, the CPU only performs one operation, and the verifier waits for a specific time based on experience to check. The disadvantage of this approach is also obvious: a test case can only be completed. Minimized simple checks, unable to make complex continuity test cases due to the uncertainty of waiting time

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