SMV and GOOSE message filter method based on FPGA
A message filtering and message technology, applied in digital transmission systems, electrical components, transmission systems, etc., can solve the problems of difficult to guarantee the real-time performance of network data transmission, complex Ethernet network mechanism, etc., to solve the problems of network stress testing, The effect of improving processing efficiency and improving performance
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[0024] In an embodiment of the present invention, the FPGA module is set for message filtering in the power automation device, such as figure 2 shown. The FPGA includes an internal bus interface, an internal MAC network port and a filtering module corresponding to each internal MAC network port. The CPU of the power automation device exchanges data with the FPGA through the bus interface inside the FPGA, and the FPGA receives external messages through the internal MAC. image 3 with Figure 4 The schematic diagram of applying this scheme to SMV board and GOOSE board is given respectively. exist image 3 with Figure 4 In some occasions, the FPGA completes the filtering work of SMV or GOOSE messages respectively. Its filtering steps are as follows figure 1 shown.
[0025] figure 1 In step 1, after the FPGA chip in the power automation device receives a complete frame of SMV or GOOSE message through the internal MAC, it scans the MAC address table of the filter module c...
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