A kind of fpga circuit and its design method
A circuit design and circuit technology, applied in logic circuits, logic circuits using specific components, logic circuits using basic logic circuit components, etc., can solve problems such as long critical path delays and failure to meet high-speed signal circuit design requirements
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Embodiment 1
[0043] Considering that the existing FPGA circuit sets the critical path delay too long, which leads to the technical problem that the design requirements of the high-speed signal circuit design cannot be met, the present embodiment provides a circuit of FPGA, which circuit includes: input and output unit, wiring A unit and a configurable logic unit, the wiring unit includes a first multiplexer, and the configurable logic unit includes a combinational logic circuit; the input end of the first multiplexer is connected to the output end of the input-output unit connected, the output terminal of the first multiplexer is directly connected to the input terminal of the combinational logic circuit through a register circuit.
[0044] Please refer to figure 1 , figure 1 A FPGA circuit is illustrated, including an input and output unit 11, a wiring unit 12 and a configurable logic unit 13, the wiring unit 12 includes a first multiplexer 121 and a register circuit 122, and the configu...
Embodiment 2
[0055] Figure 6 For the flow chart of a FPGA circuit design method provided in this embodiment, please refer to Figure 6 :
[0056] S601, setting a first multiplexer on the wiring unit, and setting a combinational logic circuit on the configurable logic unit;
[0057] S602, setting a register circuit between the first multiplexer and the combinational logic circuit, and connecting the input end of the register circuit to the output end of the input-output unit, and the output end of the register circuit It is connected with the input terminal of the combinational logic circuit.
[0058] In this embodiment, the register circuit is specifically composed of at least one flip-flop, or directly uses the data register circuit of the FPGA.
[0059] In this embodiment, the register circuit set by the design method is specifically a register circuit set on the wiring unit, and the wiring unit further includes a first multiplexer, and the first multiplexer is configured by the regi...
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