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A kind of fpga circuit and its design method

A circuit design and circuit technology, applied in logic circuits, logic circuits using specific components, logic circuits using basic logic circuit components, etc., can solve problems such as long critical path delays and failure to meet high-speed signal circuit design requirements

Active Publication Date: 2019-02-12
SHENZHEN PANGO MICROSYST CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The main technical problem that the present invention solves is: the present invention provides a kind of FPGA circuit and design method, solves the technical problem that in the existing FPGA design, the design critical path delay is relatively long, and the design requirements for high-speed signal circuit design cannot be reached

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  • A kind of fpga circuit and its design method
  • A kind of fpga circuit and its design method
  • A kind of fpga circuit and its design method

Examples

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Embodiment 1

[0043] Considering that the existing FPGA circuit sets the critical path delay too long, which leads to the technical problem that the design requirements of the high-speed signal circuit design cannot be met, the present embodiment provides a circuit of FPGA, which circuit includes: input and output unit, wiring A unit and a configurable logic unit, the wiring unit includes a first multiplexer, and the configurable logic unit includes a combinational logic circuit; the input end of the first multiplexer is connected to the output end of the input-output unit connected, the output terminal of the first multiplexer is directly connected to the input terminal of the combinational logic circuit through a register circuit.

[0044] Please refer to figure 1 , figure 1 A FPGA circuit is illustrated, including an input and output unit 11, a wiring unit 12 and a configurable logic unit 13, the wiring unit 12 includes a first multiplexer 121 and a register circuit 122, and the configu...

Embodiment 2

[0055] Figure 6 For the flow chart of a FPGA circuit design method provided in this embodiment, please refer to Figure 6 :

[0056] S601, setting a first multiplexer on the wiring unit, and setting a combinational logic circuit on the configurable logic unit;

[0057] S602, setting a register circuit between the first multiplexer and the combinational logic circuit, and connecting the input end of the register circuit to the output end of the input-output unit, and the output end of the register circuit It is connected with the input terminal of the combinational logic circuit.

[0058] In this embodiment, the register circuit is specifically composed of at least one flip-flop, or directly uses the data register circuit of the FPGA.

[0059] In this embodiment, the register circuit set by the design method is specifically a register circuit set on the wiring unit, and the wiring unit further includes a first multiplexer, and the first multiplexer is configured by the regi...

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Abstract

The invention discloses an FPGA circuit and a design method thereof. The circuit is composed of an input / output unit, a wiring unit, and a configurable logic unit. The wiring unit includes a first multi-path selector. The configurable logic unit includes a combined logic circuit. The input terminal of the first multi-path selector is connected with the output terminal of the input / output unit; and the output terminal of the multi-path selector and the input terminal of the combined logic circuit are connected directly by a register circuit. Because of the register circuit arranged between the input / output unit and the combined logic circuit of the configurable logic unit, a key path between a register of the input / output unit and a register of the configurable logic unit is shortened, thereby reducing the delay between the two registers is reduced. Therefore, a technical problem that a design requirement of a high-speed signal circuit design can not be met in the prior art can be solved; the function of adjusting the FPGA time sequence according to different design requirements can be realized; and the maximum frequency of the FPGA circuit design is improved.

Description

technical field [0001] The invention relates to the field of programmable integrated circuit design, in particular to an FPGA circuit and a design method thereof. Background technique [0002] FPGA (Field-Programmable Gate Array), that is, Field Programmable Gate Array, is a product of further development on the basis of programmable devices such as PAL, GAL, and CPLD. It emerged as a semi-custom circuit in the field of application-specific integrated circuits (ASIC), which not only solves the shortcomings of custom circuits, but also overcomes the shortcomings of the limited number of original programmable device gates. [0003] Generally speaking, FPGA is composed of the following parts: input and output unit, configurable logic unit, internal storage unit, global clock network unit, multiplier, routing resource (Routing Resource) and other resources. Through the above unit modules, users can freely program to realize the functional circuits they need. At the same time, ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03K19/173
CPCH03K19/1735
Inventor 刘贝贝
Owner SHENZHEN PANGO MICROSYST CO LTD
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