Semiconductor device manufacturing method
A device manufacturing method and semiconductor technology, which are applied in the fields of semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, electrical components, etc., can solve the problem of large aspect ratio of TSV trenches, unable to meet the needs of the industry, and difficult to etch and fill. and other problems, to achieve the effect of reducing the difficulty of etching and filling, reducing the difficulty of alignment, and increasing the degree of convenience
Active Publication Date: 2018-07-27
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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Problems solved by technology
As the size becomes smaller, the aspect ratio of the TSV trench increases, making etching and filling more difficult
Conventional etching and filling processes are gradually unable to meet the needs of the industry. Therefore, it is necessary to improve the TSV structure and manufacturing method for 3D interconnection to meet the requirements of technological development.
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[0027] Hereinafter, the present invention will be described through specific embodiments shown in the drawings. However, it should be understood that these descriptions are only exemplary, and are not intended to limit the scope of the present invention. In addition, in the following description, descriptions of well-known structures and technologies are omitted to avoid unnecessarily obscuring the concept of the present invention.
[0028] The present invention provides a method for manufacturing a semiconductor device, and specifically relates to a method for manufacturing a 3D device formed by using a TSV template wafer. Below, see attached Figure 1-8 , The semiconductor device manufacturing method provided by the present invention will be described in detail.
[0029] First, see the attached figure 1 with 2 ( figure 1 Is a top view, figure 2 Is a cross-sectional view), a TSV template wafer 1 with a front and a back surface is provided, and a number of uniformly distributed T...
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The present invention provides a semiconductor manufacturing method, which uses a TSV template wafer and a product wafer to form a sandwich structure, wherein the TSV template wafer has a uniformly distributed TSV structure, which is used to provide electrical connections between product wafers, 3D interconnection is formed. The TSV template wafer is obtained by thinning the semiconductor wafer, which reduces the difficulty of etching and filling; by setting the connecting parts on the TSV template wafer, it facilitates the interconnection of the upper and lower product wafers, reducing the difficulty of alignment, and The convenience of electrical connection design of 3D devices is increased.
Description
Technical field [0001] The present invention relates to the field of semiconductor device manufacturing methods, and in particular, to a manufacturing method of a 3D device formed by using a TSV (Through Silicon Via) template wafer. Background technique [0002] With the continuous advancement of semiconductor technology, the feature size of integrated circuits continues to shrink, and the size of TSVs used for 3D interconnection is getting smaller and smaller. The patterning, etching and filling process of TSV has encountered unprecedented challenges. As the size becomes smaller, the aspect ratio of the TSV trench increases, and etching and filling become more difficult. Conventional etching and filling processes are gradually unable to meet the needs of the industry. Therefore, TSV structures and manufacturing methods for 3D interconnection need to be improved to meet the requirements of technological development. Summary of the invention [0003] The present invention provide...
Claims
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IPC IPC(8): H01L21/60
CPCH01L21/486H01L21/76898H01L23/147H01L23/49827
Inventor 钟汇才赵超朱慧珑
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI