Semiconductor memory device and driving method thereof
A technology of a storage device and a driving method, which is applied in information storage, static memory, digital memory information, etc., and can solve problems such as time-consuming and time-consuming
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no. 1 example
[0039] figure 1 is a diagram showing the configuration of the semiconductor memory device of the first embodiment. The semiconductor memory device of this embodiment includes a memory cell array 10 . The memory cell array 10 includes a plurality of bit lines (BL0 to BLn) and a plurality of word lines (WL0 to WLn). A variable resistance element VR is connected between each bit line and each word line.
[0040] As the variable resistance element VR, for example, a bipolar type variable resistance element can be used, and the state of this bipolar type variable resistance element can be changed by changing the polarity of the voltage applied between the electrodes of the variable resistance element. Set to high resistance state or low resistance state. Further, a variable resistance element that changes the resistance value by forming a conductive bridge between electrodes by precipitating metal cations or breaking a conductive bridge by ionizing deposited metal may be used. ...
no. 2 example
[0050] figure 2 is a diagram for describing the driving method of the semiconductor memory device of the second embodiment. This driving method is shown in the state transition diagram. In this embodiment, a mode (106) is included that transitions directly from the standard mode (100) to the SBRD mode (600), in which data from selected memory cells is read. In SBRD mode (600), the voltage of only one of the selected word line connected to the selected memory cell or the selected bit line connected to the selected memory cell is changed to read the data of the selected memory cell . Further, a mode (161) including transition from SBRD mode (600) to standby mode (100), and a mode (602) including transition from SBRD mode (600) to precharge state (200).
[0051] In this embodiment, a mode (107) is included that transitions directly from the standby mode (100) to the SBWT mode (700), wherein data is written to selected memory cells. In the SBWT mode (700), the voltage of only...
no. 3 example
[0058] image 3 is a diagram for describing the driving method of the semiconductor memory device of the third embodiment. This driving method is shown in the state transition diagram. Configurations corresponding to the above-described embodiments are denoted by the same reference numerals. In this example, include the figure 2 Standby mode (100), SBRD mode (600), precharge state (200), read mode (300) and write mode (400) among the various modes described in . Switching from standby mode (100) to SBRD mode ( 600) conversion.
[0059] In this embodiment, an SBRD mode (600) of directly reading data from selected memory cell VR1 without entering the precharge state (200) is included. Therefore, data can be quickly read from the selected memory cell VR1. Since the transition to the SBRD mode (600) is performed without entering the precharge state (200), the precharge state PRCH before data is read can be eliminated and power consumption can be reduced.
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