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Bus system including bridge circuit for connecting interlock bus and split bus

A bridge circuit and bus system technology, applied in the direction of electrical digital data processing, instruments, etc., can solve the problems that the existing technology cannot be applied, and achieve the effect of avoiding deadlock

Active Publication Date: 2016-10-26
FANUC LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, the prior art cannot be applied in the case where the interlock bus is a bus that does not support retry

Method used

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  • Bus system including bridge circuit for connecting interlock bus and split bus
  • Bus system including bridge circuit for connecting interlock bus and split bus
  • Bus system including bridge circuit for connecting interlock bus and split bus

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Embodiment Construction

[0018] refer to figure 1 First, second, and third embodiments of the bus system according to the present invention will be described.

[0019] First, a first embodiment of the bus system according to the present invention will be described.

[0020] The bus system involved in this embodiment is a system in which an internal bus connects a device (device) constituted by an interlock bus to opposing devices such as a CPU through a branch bus on a printed substrate. The structure of two bridge circuits in which the bus and the branch bus are bridged.

[0021] Bus system 1 such as figure 1 As shown, the internal bus is configured to connect the device 10 composed of the interlock bus 20 to the opposite device 30 having the CPU core 31, DMAC32, etc. through the branch bus 50 on the printed circuit board. In the interlock bus 20 in the device 10 Two bridge circuits 11 and 12 connecting the interlock bus 20 and the branch bus 50 are provided.

[0022] The first bridge circuit 11 ...

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PUM

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Abstract

A bus system is configured by connecting an unretriable interlock bus and a split bus through first and second bridge circuits and respectively connecting first and second channels of the split bus and the interlock bus through the first and second bridge circuits. An access from the split bus side to the interlock bus side is processed by the first bridge circuit and an access from the interlock bus side to the split bus side is processed by the second bridge circuit, whereby a deadlock during a bus conflict is avoided.

Description

technical field [0001] The invention relates to a bus system with a bridge circuit connecting an interlock bus and a branch bus. Background technique [0002] In the inter-chip bus (inter-chip bus) and on-chip bus (on-chip bus) inside the electronic device, there are: an interlock bus (interlock bus), which occupies the bus from the start request access to the end response; the branch bus (split bus) bus) that can perform other accesses without occupying the bus between requesting access and responding thereto. As examples of the branch bus, there are PCI Express and AMBA AXI, and further, as examples of the interlock bus, there are PCI bus and AMBA APB. Therefore, a bridge circuit (bridge circuit) connecting the interlock bus and the branch bus may exist inside the electronic device. [0003] Using such a bridge circuit, for example, think of the form of connecting two interlock buses via a branch bus, there is an access from one interlock bus to the other interlock bus v...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/40
CPCG06F13/1652G06F13/1673G06F13/1678G06F13/4282G06F13/4036
Inventor 小松孝彰辻真大
Owner FANUC LTD