A power device packaging structure and a packaging method
A technology of power device and packaging structure, applied in the field of power device packaging structure and packaging, can solve the problems of poor thermal conductivity of device packaging, low withstand voltage of external pins, small size of packaged chips, etc., to achieve good thermal conductivity and increase thermal conductivity area. , increase the optional effect
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[0025] The specific embodiment of the present invention is described below in conjunction with accompanying drawing
[0026] Such as Figure 5 As shown, a packaging structure of a power device in the present invention includes a chip slot 1 , a metal casing 2 , an annular bonding layer 3 , four outer pins 4 , and a metal cover plate 5 . The size of the chip groove is 10*9*3mm, which is a traditional TO263-5L package ( image 3 The size of the chip slot 1 of ) should be large, and a chip with a larger volume can be placed to realize a large chip and a small package. The heat conduction area in the chip slot 1 is enlarged.
[0027] For the four-pin structure of some new power devices, especially power devices used in the pulse field, the traditional three-pin package no longer meets the packaging requirements of this type of chip, such as figure 1 As shown, if a three-pin package is used, for the IGBT chip used in the pulse discharge circuit, a large current will pass through...
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