A kind of floating gate flash memory and its preparation method

Abstract

The invention relates to the technical field of non-volatile memory manufacturing, in particular to a floating gate flash memory and its preparation method. After the floating gate is etched, silicon oxide and silicon nitride are deposited on the silicon wafer, and then dry-etched Form a silicon nitride isolation film by means of a silicon nitride isolation film, then deposit a layer of silicon oxide as a hard mask for silicon nitride wet etching, and then use a wet method to remove silicon nitride other than the floating gate and the word line (ie, the drain) and silicon oxide on the surface of the silicon wafer to form a silicon nitride isolation spacer between the floating gate and the word line; the silicon nitride isolation spacer forms an effective isolation between the floating gate and the word line, and has an extremely thin The thickness will not affect the programming efficiency of the device; on the one hand, the preparation method of the floating gate flash memory of the present invention realizes thinning the thickness of the isolation layer between the floating gate and the word line, and on the other hand, effectively improves the programming efficiency of the device.

Description

technical field [0001] The invention relates to the technical field of nonvolatile memory manufacturing, in particular to a floating gate flash memory and a preparation method thereof. Background technique [0002] In floating gate flash memory, the thickness of the isolation layer between word line (WL) and floating gate (FG) directly affects the writing efficiency of floating gate flash memory. The advantage of this method is that the process is relatively simple. [0003] However, because the thickness of the isolation layer between the word line and the floating gate directly determines the isolation performance of the floating gate and the programming efficiency of the floating gate flash memory, the existing practice is to form the sidewall structure by HTO after the control gate (CG) is formed. The method of using the sidewall structure formed by the HTO method to isolate FG and WL requires a thicker isolation layer to achieve better isolation; based on the current p...

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Problems solved by technology

[0003] However, because the thickness of the isolation layer between the word line and the floating gate directly determines the isolation performance of the floating gate and the programming efficiency of the floating gate flash memory, the existing practice is to form the sidewall structure by HTO after the control gate (CG) is formed. The method of using the sidewall structure formed by the HTO method to isolate FG and WL requires a thicker isolation layer to achieve better isolation; based on the current process flow, it is more effective to increase the programming efficiency of floating gate flash memory. It is to reduce the thickness of the isolation layer between the floating gate and the word line, but this method will affect the isolation between the floating gate and the word line, thereby affecting the working performance of the entire device

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