Multi-Chip Stack Package Structure

Abstract

A multi-chip stack package structure including a circuit carrier, a first chip, solder balls, a second chip and bonding wires is provided. The circuit carrier has first pads and second pads. The first chip is disposed on the circuit carrier. The first chip has a first active surface, a first back surface and first conductive pillars located on the first active surface. The solder balls are electrically connected to the first conductive pillar and the first pads respectively. The second chip has a second active surface, a second back surface and second conductive pillars located on the second active surface, wherein the second chip is disposed on the first chip and the second back surface is opposite to the first back surface. The bonding wires are electrically connected to the second conductive pillar and the second pads respectively. The structure accords with design requirements of high integrated density and micro interval.

Description

technical field [0001] The present invention relates to a packaging structure, and in particular to a chip stack packaging structure combined with flip-chip and wire bonding. Background technique [0002] In the current chip packaging process, the chip is usually electrically connected to the circuit carrier through wire bonding or flip chip bonding. As far as wire bonding is concerned, it is to connect the chip bonding area of ​​the circuit carrier on the back side relative to the active surface of the chip, and electrically connect the pads on the active surface and the contacts on the circuit carrier through metal wires. In addition, as far as flip-chip bonding is concerned, it is to first make solder bumps on the pads on the active surface of the chip, and then make the active surface of the chip face the chip bonding area of ​​the circuit carrier, and make the solder bumps The blocks are aligned with the contacts on the circuit board. After that, the solder bumps are ...

AI Technical Summary

Problems solved by technology

However, under the requirements of the current electronics industry for maximum electrical performance, low cost, high integration of integrated circuits, and fine pitch (fine pitch), wire bonding or flip-chip bonding are used to electrically connect chips and circuits. The packaging process and packaging structure of the carrier board can no longer fully meet the requirements of today's electronics industry

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