Information delay time analysis and distribution method for integrated modular avionics system

Abstract

The invention discloses an information delay time analysis and distribution method for an integrated modular avionics system. The method comprises the steps of (a), obtaining operation time or a partition scheduling period of each node; (b), determining an information stream, determining information passing nodes and analyzing to obtain information maximum allowed delay time according to system architecture; (c), obtaining a demand of a terminal node for an input information update period through analysis of a function performance demand of the terminal node; (d), starting from the demand of the terminal node for the input information update period, calculating an information collection period of a front end node; (e), distributing system delay time to each node according to the information maximum allowed delay time; and (f), distributing an output information update period and network maximum allowed delay time to each node. According to the method, whether the system architecture is reasonable or not can be determined, and whether a high-time-sensitivity function can be realized or not can be determined. Moreover, the basis is provided for determination of parameter demands such as the information collection period, and platform and subsystem performance.

Description

【Technical field】 [0001] The invention relates to a time delay analysis and distribution method from front-end collection to terminal application in the information transfer process of an integrated modular avionics system, and supports data update cycle, inter-node delay time, partition scheduling cycle, and sub-system in the system design process. Establish design indicators such as running time, and support the analysis of the rationality of the system architecture. 【Background technique】 [0002] Under the traditional combined avionics system architecture, only one application resides in a single device between subsystems to realize the functions of a single system, and the information data between subsystems and devices communicates through a directly connected bus, from the source The worst-case bus communication delay from node to target node is the actual maximum delay time, so the maximum allowable delay in system design must be greater than the actual maximum delay...

AI Technical Summary

Problems solved by technology

In engineering practice, due to the lack of effective analysis of the time delay of information flow at the beginning of the design, it was found that the transmission of operation instructions was seriously lagging behind during the successful development of the prototype and the comprehensive joint test process, and the design goals could not be effectively achieved, so the system architecture was revised. Substantial adjustments and addition of new equipment will ultimately affect the project schedule and cost

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