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Chip security test method and system based on fault injection

A technology of fault injection and safety testing, which is applied in the detection of faulty computer hardware, error detection/correction, instruments, etc. It can solve the problems that high-precision fault injection testing cannot be performed, and achieve the effect of improving accuracy and accuracy

Active Publication Date: 2017-01-11
SHENZHEN INST OF ADVANCED TECH
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  • Claims
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Problems solved by technology

[0009] The embodiment of the present invention provides a chip security testing method based on fault injection to solve the technical problem in the prior art that high-precision fault injection testing cannot be performed when the semiconductor manufacturing process develops from micron to deep submicron or even nanometer nodes

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  • Chip security test method and system based on fault injection
  • Chip security test method and system based on fault injection
  • Chip security test method and system based on fault injection

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Embodiment Construction

[0025] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be described in further detail below in conjunction with the embodiments and accompanying drawings. Here, the exemplary embodiments and descriptions of the present invention are used to explain the present invention, but not to limit the present invention.

[0026] In an embodiment of the present invention, a chip security testing method based on fault injection is provided, such as figure 1 As shown, the method includes:

[0027] Step 101: Using the synchronous control unit to focus the femtosecond laser on different positions on the surface of the chip to be tested in sequence, and perform fault injection on different positions of the chip to be tested, wherein the femtosecond laser is in the chip to be tested Two-photon absorption occurs, so that the logic unit in the chip under test is flipped;

[0028] Step 102: When the chip to be tested is...

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Abstract

The embodiment of the invention provides a chip security test method and system based on fault injection. The method comprises the following steps: focusing femtosecond laser on different positions of the surface of a chip to be tested in sequence through a synchronous control unit, and carrying out fault injection on different positions of the chip to be tested, wherein the femtosecond laser generates two-photon absorption in the chip to be tested to enable a logic unit in the chip to be tested to be overturned; under a situation that the different positions of the chip to be tested are irradiated by the femtosecond laser, operation results output by the chip to be tested are respectively collected; the collected operation results are respectively compared and analyzed with a preset correct operation result of the chip to be tested to determine whether the positions, which are irradiated by the femtosecond laser, of the chip to be tested are subjected to effective faults or not, wherein the amount of the positions subjected to the effective fault is a basis for judging the security degree of the chip to be tested. According to the scheme, fault injection accuracy can be improved, and the scheme is favorable for improving the success rate of the chip security test on the basis of the fault injection.

Description

technical field [0001] The invention relates to the technical field of chip testing, in particular to a chip security testing method and system based on fault injection. Background technique [0002] With the development of space technology and nuclear technology, semiconductor ionizing radiation effects (also known as single event effects) are further classified and studied, such as single event latch-up (Single event latch-up, SEL for short), single event upset (Single event upset, SEU for short), single event functional interrupt (Single event functional interrupt, SEFI for short), and single event burnout (Single event burnout, SEB for short), etc. According to whether the impact of single event effects on electronic components can be recovered, single event effects can be divided into unrecoverable errors and recoverable errors. "Non-recoverable error" or "hard error" refers to an error that will cause fatal and permanent damage to the device or system once it occurs, ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/22
CPCG06F11/2268
Inventor 邵翠萍李慧云唐烨
Owner SHENZHEN INST OF ADVANCED TECH