Emulator that supports eeprom power down test

Abstract

The invention discloses a simulator supporting an EEPROM power failure test. The simulator comprises an EEPROM, a simulation chip, a machine tool power supply detection module, and a power supply module; the machine tool power supply detection module can automatically detect a power supply state of a contact type or non-contact type machine tool, and controls the simulation chip to be in a non-reset state, namely, a normal working state, through a reset signal line when the machine tool is powered; the machine tool power supply detection module controls the power supply module to supply power to the EEPROM by a power supply line through a control signal; the machine tool power supply detection module controls the simulation chip to enter the reset state through the reset signal line when the machine tool is not powered, namely, the machine tool loses the power, so as to enable the simulation chip not to work; and the machine tool power supply detection module controls the power supply module to no longer supply the power to the EEPROM by the power supply line through the control signal, namely, the EEPROM loses the power. According to the simulator, the development, debugging and testing of user programs can be facilitated and the code development efficiency is improved.

Description

technical field [0001] The invention relates to the field of emulators, in particular to an emulator supporting EEPROM (Electrically Erasable Programmable Read-Only Memory, Electrically Erasable Programmable Read-Only Memory) power-down test. Background technique [0002] There is a user program developed by the user in the processor chip. In the writing and debugging of the user program, the tool used is generally an emulator. The emulator uses an emulation chip containing various functions of the product processor chip to simulate the working behavior of the product processor chip, and the emulation chip and other parts of the emulator (program memory for storing user programs, data memory for storing data, and user The integrated development environment connection on the computer, etc.) cooperates to realize the simulation operation of the user program and various debugging functions. [0003] For the smart card chip with on-chip EEPROM, in the existing emulator design, ...

AI Technical Summary

Problems solved by technology

However, in the existing emulators, the emulation chip uses SRAM instead of EEPROM, and SRAM can be written without erasing, and there is no page structure, which makes it impossible to simulate the power failure of the product chip EEPROM when erasing , the power-down protection code in the program cannot be debugged and tested on the emulator

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