Electronic device having fault monitoring for a memory and associated methods

A technology for electronic equipment and fault detection circuits, applied in the field of memory, which can solve problems such as permanent faults and transient faults

Active Publication Date: 2017-06-06
STMICROELECTRONICS SRL
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Permanent and transient faults may

Method used

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  • Electronic device having fault monitoring for a memory and associated methods
  • Electronic device having fault monitoring for a memory and associated methods
  • Electronic device having fault monitoring for a memory and associated methods

Examples

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Embodiment Construction

[0012] The present invention will now be described more fully hereinafter with reference to the accompanying drawings, in which preferred embodiments of the invention are shown. However, this invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Like numbers refer to like elements throughout, and prime notation is used to indicate like elements in alternate embodiments.

[0013] First refer to figure 1 , an electronic device 100 is shown having a fault detection circuit 102 coupled to a memory 104 . Memory 104 may have multiple memory locations that are subject to transient and permanent failures. Fault detection circuit 102 may be configured to read memory 104 at a first time (e.g., power down) and determine a first fault count inclu...

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Abstract

An electronic device includes a memory having memory locations being subject to transient faults and permanent faults, and a fault detection circuit coupled to the memory. The fault detection circuit is configured to read the memory locations at a first time, and determine a first fault count and fault map signature including the transient and permanent faults at the first time based upon reading the plurality of memory locations, and to store the first fault count and fault map signature. The fault detection circuit is configured to read the memory locations at a second time and determine a second fault count and fault map signature including the transient and permanent faults at the second time based upon reading the memory locations, and compare the stored first fault count and fault map signature with the second fault count and fault map signature to determine a permanent fault count.

Description

technical field [0001] The present invention relates to the field of memory, and more particularly to efficient fault monitoring and related methods in memory. Background technique [0002] Applications can tolerate some degree of memory failure before being interrupted abruptly. Permanent faults and transient faults may occur during the execution of the application. Permanent faults are generally defined as faults that are permanent and do not disappear when the application is closed. Permanent failures are usually caused by physical defects in the memory. Transient faults are faults that occur during the execution of an application and disappear when the application is closed. Transient failures are usually caused by changes in data values ​​in the absence of physical defects in the memory, and can occur due to environmental conditions. [0003] Typically, transient failures occur much more frequently than permanent failures and are the result of the memory manifesting...

Claims

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Application Information

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IPC IPC(8): G11C29/42G11C29/44G06F11/10
CPCG06F11/1004G11C29/42G11C29/44G06F11/073G06F11/076G06F11/0772G06F11/079G06F11/16G06F11/0751G06F11/08G11B2020/1843G11C29/02G11C29/04
Inventor O·兰简F·E·C·迪塞格尼
Owner STMICROELECTRONICS SRL
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