Method for realizing voltage regulation by digital low dropout voltage regulator and digital low dropout voltage regulator
A low-dropout voltage regulator, digital technology, applied in the method and digital low-dropout voltage regulator, the digital low-dropout voltage regulator realizes the field of voltage regulation, and can solve the problem of increasing the start-up time of D-LDO and reducing the response of D-LDO output voltage speed and other issues to achieve the effect of reducing the time required for stabilization, reducing the ringing phenomenon, and shortening the startup time
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[0031] In order to make the purpose, technical solution and advantages of the present invention more clear, the embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings. It should be noted that, in the case of no conflict, the embodiments in the present application and the features in the embodiments can be combined arbitrarily with each other.
[0032] Whether it can quickly achieve output stability is an important indicator of D-LDO design. In order to solve the problem of the slow response speed of the output voltage of the D-LDO, the inventor of the present application proposes: using the relationship between the change of the output voltage of the D-LDO and the numerical change of the conduction of the PMOS transistor during the start-up process, to obtain the stable output of the output voltage The conduction value of the PMOS transistor can be directly controlled according to the obtained value of the PMOS tran...
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