PCB inner circuit interconnection structure and processing method thereof

A technology of inner-layer circuit and interconnection structure, which is applied in the direction of multi-layer circuit manufacturing, printed circuit, printed circuit manufacturing, etc., to achieve the effect of eliminating parasitic effect distortion and ensuring normal conduction.
CN106973492AActive Publication Date: 2017-07-21SHENNAN CIRCUITS
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Patent Information

Authority / Receiving Office
CN Β· China
Patent Type
Applications(China)
Current Assignee / Owner
SHENNAN CIRCUITS
Publication Date
2017-07-21

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Abstract

The invention discloses a PCB inner circuit interconnection structure and a processing method thereof, and is used for solving problems related to signal transmission and caused by a conventional via hole stub and ensuring layer-to-layer conduction. The technical scheme is that the PCB inner circuit interconnection structure comprises a conductive material arranged between an Lm layer and an Lm+1 layer of the PCB inner circuit and used for achieving layer-to-layer conduction, and a via hole passing through the position of the conductive material, hole copper of the via hole is connected with the conductive material, hole copper of the via hole in certain depth is removed, the depth of the removed hole copper is between the Lm layer and the Lm+1 layer, and m is a positive integer.
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Description

technical field

[0001] The invention relates to the technical field of PCB processing, in particular to a PCB inner layer circuit interconnection structure and a processing method thereof. Background technique

[0002] Printed circuit boards (Printed Circuit Board, PCB) are more and more widely used, and the design requirements are becoming more and more complex. When designing the inner layer circuit, the customer has high signal transmission requirements for the inner layer circuit of some holes or slots. According to the principle of parasitic effect, when a signal transmits an active link in the line, other parameters besides its own parameters will be generated, such as parasitic inductance, parasitic capacitance, coupling capacitance, etc. However, when designing circuits, many inner-layer circuits that do not need to be connected can be connected due to the limitation of processing technology.

[0003] The traditional processing method of the via hole in the PCB is ...

Claims

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