Sampling time mismatch correction method for time interleaving ADC based on binary search

Abstract

The invention provides a sampling time mismatch correction method for a time interleaving ADC based on binary search, and belongs to the field of design of integrated circuits. The method comprises the following steps: when a sampling time mismatch token state | Bi | is not smaller than Bs, adjusting a sampling time mismatch correction coefficient Tcali (n+1) in a correction period by using a method combining a binary search method with a fixed correction step length, when | Bi | is smaller than Bs, adjusting the sampling time mismatch correction coefficient Tcali (n+1) in a next correction period by using the fixed correction step length, feeding back the adjusted Tcali (n+1) to a clock unit in the time interleaving ADC, adjusting the clock phase of the i time interleaving ADC channel, so that the sampling time mismatch is continuously reduced so as to accomplish the sampling time mismatch correction in the correction period, wherein Bs is the maximum range of | Bi | in the case of sampling time mismatch, which is called a sampling time mismatch threshold. According to the sampling time mismatch correction method provided by the invention, the correction period is greatly shortened by using the binary search method; and the correction algorithm of the fixed correction step length is adopted to ensure the correction precision.

Description

technical field [0001] The invention relates to the field of integrated circuit design, in particular to a time-interleaved analog-to-digital converter, in particular to a correction algorithm for sampling time mismatch of the time-interleaved analog-to-digital converter. Background technique [0002] An analog-to-digital converter (ADC) is a bridge connecting the analog world and the digital world. It can quantize an analog signal into a digital signal that can be easily processed with various digital processing techniques. With the development of digital signal processing technology and integrated circuit manufacturing technology, the speed of digital circuits is getting faster and faster. Correspondingly, the requirements for the conversion rate of analog-to-digital converters are also getting higher and higher. The time-interleaved ADC is a kind of ADC capable of achieving high sampling rate. It adopts a time-interleaved architecture and includes M sub-channel analog-to-...

AI Technical Summary

Problems solved by technology

Although the algorithm can correct the sampling time mismatch very well, the algorithm adopts a linear adjustment method when adjusting the sampling time mismatch, so its convergence speed is related to the size of the mismatch value. For a larger mismatch value , it takes more calibration cycles to achieve the purpose of calibration

Images