Hardware Implementation Method of Uplink Joint Carrier Synchronization Based on Massive MIMO
A carrier synchronization, hardware implementation technology, applied in the field of communication, can solve the problems of difficult application, high complexity, less application, etc., achieve accurate and reliable frequency offset estimation, optimize time domain frequency offset estimation results, and reduce implementation complexity. and the effect of resource consumption
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[0045] The technical solutions provided by the present invention will be described in detail below in conjunction with specific examples. It should be understood that the following specific embodiments are only used to illustrate the present invention and are not intended to limit the scope of the present invention.
[0046]The massive MIMO-based uplink joint carrier synchronization hardware implementation method provided by the present invention is implemented based on FPGA, which is the most commonly used semi-custom circuit for hardware development, and many related auxiliary development products also accelerate the update and development of FPGA. Using the PXI platform of National Instrument (NI) for FPGA development breaks the tradition of hardware programming language for FPGA development. NI's LabVIEW programming idea based on graphic language makes hardware development more convenient and the development cycle is greatly shortened. Hardware developers can use More focus...
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