Method for avoiding functional abnormalities of PCIE devices caused by address space allocation
An address space and abnormal function technology, applied in the field of server firmware, can solve problems such as unusable, abnormal PXE function, PXE failure, etc., and achieve the effect of avoiding abnormal function
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Examples
Embodiment Construction
[0014] A method for avoiding abnormal function of PCIE equipment due to address space allocation, comprising the following steps:
[0015] S1. In Legacy mode, the PCIE device describes the required address space in the BAR, and the BIOS builds an address map for the address space required by the PCIE device to describe the allocation of system resources and allocate address space for each PCIE device; PCIE devices are very configurable and easy to operate, a large part of which is due to the dynamic allocation of their address space. The dynamic allocation of address space is realized by relying on BAR (base address register). BAR is the six registers from 0x10 to 0x24 in the PCIE configuration space, which are used to define the size of the configuration space required by PCIE and configure the address space occupied by PCIE devices.
[0016] S2. The system judges the PCIE device type by the value of Base Class and / or Sub-Class in "PCI Local Bus Specification Revision 3.0": ...
PUM
Abstract
Description
Claims
Application Information
- R&D Engineer
- R&D Manager
- IP Professional
- Industry Leading Data Capabilities
- Powerful AI technology
- Patent DNA Extraction
Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.
© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com