Current mode RM or non- xor unit based on FinFET transistor

Abstract

The invention discloses a current mode RM or non- xor unit based on a FinFET transistor. The current mode RM or non- xor unit comprises a first P type FinFET tube, a second P type FinFET tube, a first N type FinFET tube, a second N type FinFET tube, a third N type FinFET tube, a fourth N type FinFET tube, a fifth N type FinFET tube, a sixth N type FinFET tube and a seventh N type FinFET tube, wherein the first P type FinFET tube and the second P type FinFET tube are low-threshold P type FinFET tubes, the first N type FinFET tube, the second N type FinFET tube, the third N type FinFET tube, the fourth N type FinFET tube, the fifth N type FinFET tube, the sixth N type FinFET tube and the seventh N type FinFET tube are high-threshold N type FinFET tubes. The current mode RM or non- xor unit has the advantages that the circuit area, the delay, the power consumption and the power delay product are smaller on the basis of a current logic function.

Description

technical field [0001] The invention relates to an RM logic OR non-exclusive OR unit, in particular to a current mode RM OR non-exclusive OR unit based on a FinFET transistor. Background technique [0002] The basic gate circuit is the most basic logic unit in the digital circuit, and the XOR and XOR gate circuits are an indispensable part of the basic logic circuit. Current-mode logic circuits have the characteristics of high operating frequency, low power consumption, and strong anti-interference ability. However, traditional CMOS current-mode logic still faces the problems of large number of transistors, high power consumption, and complex design. With the continuous advancement of VLSI technology, the operating speed and power consumption requirements of digital systems continue to increase, and the performance requirements for basic logic units are also more stringent, requiring that basic logic units should have lower power consumption and smaller delay. [0003] When...

AI Technical Summary

Problems solved by technology

The RM logic does not avoid the series connection of CMOS transistors in the pull-down network, resulting in a three-layer logic. The series connection of CMOS transistors will cause the stack height from the power supply to the ground to be too long. In order to make the circuit work normally, it is necessary to increase the working power of the circuit accordingly. The power consumption will increase accordingly, and the number of transistors used in the circuit will be larger at the same time, resulting in a larger circuit area, delay and power consumption delay product

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