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A compiling method and device adapted to hardware architecture

A technology of hardware architecture and compiling method, applied in the computer field, can solve the problems of low efficiency of compiling method and complicated maintenance of compiling system, and achieve the effect of improving the efficiency of compiling and improving the efficiency.

Active Publication Date: 2020-05-12
SILEAD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] However, in the existing compiling methods for adapting to computer hardware architectures, especially in solutions for compiling compatibility with multi-architecture processors, there are problems of low compiling efficiency and complex maintenance of compiling systems

Method used

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  • A compiling method and device adapted to hardware architecture
  • A compiling method and device adapted to hardware architecture
  • A compiling method and device adapted to hardware architecture

Examples

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Embodiment Construction

[0053] As mentioned above, a large computer hardware system, such as a mobile phone, has a variety of specific configurations of its processor architecture, for example, it may be 64-bit, it may be 32-bit, or it may be both 64-bit and 32-bit. Now mobile phones are tending to have both 64-bit processors and 32-bit processors. Such computers can run both 64-bit programs and 32-bit programs, which brings software programming problems, such as platform The software must support both 64-bit applications and 32-bit applications, or one of them can be specified. Another example is that an application can be compiled into 64-bit or 32-bit, or both, according to the wishes of the programmer. Then there are requirements for the compilation system to support multi-processor architecture compilation and to support multiple processor bits at the same time. However, in the existing solutions for realizing compiling compatibility of multi-architecture processors, the efficiency of compiling ...

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Abstract

The invention discloses a compiling method and device adaptive to a hardware architecture. The method comprises the steps that a default configuration file is read, wherein the default configuration file records default input configuration in a compiling process; at least one part of the default input configuration in the default configuration file is overwritten according to a current configuration input file under a directory of a current module to obtain an overwritten configuration file, wherein the overwritten configuration file contains processor architecture relevant information of a target running device; the processor architecture relevant information is analyzed to compile a processor architecture adaptive to the target running device, and control information adaptive to the processor architecture of the target running device is obtained; and a compiling script of the current module is run, at least one part of a source file of the current module is compiled according to the control information, and a target code file of the current module is output. Through the scheme, compiling efficiency and compiling system maintenance efficiency can be improved.

Description

technical field [0001] The present invention relates to the field of computer technology, in particular to a compiling method and device for adapting hardware architecture. Background technique [0002] A large computer hardware architecture, such as a mobile phone, may be 64-bit or 32-bit, or both 64-bit and 32-bit, but now mobile phones are tending to have both 64-bit processors and 32-bit processors. 64-bit processor, such a computer can run both 64-bit and 32-bit programs, which brings troubles in software programming. For example, platform software must support both 64-bit and 32-bit applications , you can also specify to support one of them, and for example, an application can be compiled into 64-bit or 32-bit according to the wishes of the programmer, or both. Then there are requirements for the compilation system to support multi-processor architecture compilation and to support multiple processor bits at the same time. [0003] However, in the existing compiling m...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F8/41
CPCG06F8/447
Inventor 赵文恒
Owner SILEAD
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