Power-on reset containing circuit applied to IO interface of digital chip

Abstract

The invention provides a power-on reset containing circuit applied to an IO interface of a digital chip. The circuit comprises a R-R voltage division circuit, a R-C charging circuit and a comparison circuit; the R-R voltage division circuit comprises a first resistor R1 and a second resistor R2 which are in series connection; the R-C charging circuit comprises a third resistor R3 and a first capacitor C1 which are in series connection; the comparison circuit comprises a comparator and a diode circuit which is connected with the output end of the comparator, one input port of the comparator is connected with a connecting line of the first resistor R1 and the second resistor R2, and the other input port of the comparator is connected with a connecting line of the third resistor R3 and the first capacitor C1. In an actual use process, after the two voltages of the second resistor R2 and the first capacitor C1 are compared through the comparator, action of the IO interface of the digital chip is contained by a comparison result. The circuit is simple, and meanwhile, time can be flexibly adjusted through simple adjustment of resistance and capacitance, so that redundant resources of latches and relatively complex external circuits in some simple control circuits are overcome.

Description

technical field [0001] The invention relates to the technical field of digital chip circuits, in particular to a power-on reset pinning circuit applied to an IO port of a digital chip, which has high flexibility, low cost, and can achieve the purpose of flexibly adjusting control time. Background technique [0002] With the rapid development of intelligence in recent years and the pursuit of intelligence in various fields, digital circuits are becoming more and more important. For traditional digital control circuits, most of them use I / O ports to add latch chips for signal delay and increase driving capabilities. Its disadvantage is that this kind of latch chip has more pins, the peripheral circuit is relatively complex, and the cost is relatively high. For some circuits that only need simple logic control, it is a waste of resources and increases the difficulty of PCB layout. [0003] How can the uncontrolled phenomenon of the IO port be restrained during operation through...

AI Technical Summary

Problems solved by technology

[0002] With the rapid development of intelligence in recent years and the pursuit of intelligence in various fields, digital circuits are becoming more and more important. For traditional digital control circuits, most of them use I / O ports to add latch chips for signal delay and increase driving capabilities. Its disadvantage is that this kind of latch chip has more pins, the peripheral circuit is relatively complex, and the cost is relatively high. It is a waste of resources for some circuits that only need simple logic control, and it increases the difficulty of PCB layout.

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