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Direct band gap ge channel cmos integrated device and its preparation method

A technology for integrating devices and channels, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc.

Active Publication Date: 2019-10-22
XIDIAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] However, the key issues currently facing are how to prepare Ge materials with larger strains to realize the transformation of the band gap type of Ge materials, and how to design and realize direct band gap Ge CMOS devices with high carrier mobility.

Method used

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  • Direct band gap ge channel cmos integrated device and its preparation method
  • Direct band gap ge channel cmos integrated device and its preparation method
  • Direct band gap ge channel cmos integrated device and its preparation method

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Embodiment 1

[0078] See figure 1 , figure 1 A process flow chart of a direct bandgap Ge channel CMOS integrated device provided by an embodiment of the present invention. The method comprises the steps of:

[0079] Step a, select Si substrate;

[0080] Step b, growing a first Ge layer on the surface of the Si substrate;

[0081] Step c, growing a second Ge layer on the surface of the first Ge layer;

[0082] Step d, forming shallow trench isolation in the second Ge layer;

[0083] Step e, implanting B ions into a specific region of the second Ge layer to form an NMOS active region;

[0084] Step f, growing a gate dielectric layer and a gate layer continuously on the surface of the second Ge layer, and etching the gate dielectric layer and the gate layer by a selective etching process to form a PMOS gate and an NMOS gate

[0085] Step g, forming a gate protection layer on the surface of the PMOS gate and the NMOS gate;

[0086] Step h, etching the second Ge layer, forming Ge steps at...

Embodiment 2

[0111] See Figure 3a-Figure 3z , Figure 3a-Figure 3z The process schematic diagram of a direct bandgap Ge channel CMOS integrated device provided by the embodiment of the present invention, on the basis of the above embodiments, this embodiment will introduce the process flow of the present invention in more detail. The method includes:

[0112] S101, substrate selection: such as Figure 3a As shown, an N-type silicon (Si) substrate 001 is selected as the initial material, and the surface is cleaned to remove the protective layer and impurities.

[0113] S102. Two-step growth of germanium epitaxial layer:

[0114] S1021. Using a chemical vapor deposition (CVD) method, grow an n-type Ge(001) thin film on the substrate by a two-step method of low and high temperature, with a doping concentration of 1 to 5×10 16 cm -3 ;

[0115] S1022, such as Figure 3b As shown, a 50 nm-thick "low temperature" Ge ((LT-Ge) film 002 was grown at 275–325 °C. Most of the relaxation of elas...

Embodiment 3

[0148] See Figure 3z , a kind of direct bandgap Ge channel CMOS integrated device that the embodiment of the present invention provides, comprises: Si substrate layer, first Ge layer, second Ge layer and Si 0.5 Ge 0.5 layer, GeO 2 Passivation layer, HfO 2 A gate dielectric layer and a TaN gate layer; wherein, the direct bandgap Ge channel CMOS integrated device is prepared and formed by the method described in the above embodiment.

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Abstract

The invention relates to a direct band gap Ge channel CMOS integrated device and a preparation method for the same. The preparation method comprises steps of choosing an Si substrate, growing a firstGe layer, growing a second Ge layer, forming shallow groove isolation, implanting B ions to form an NMOS active region, growing a gate medium layer and a gate layer, etching to form a PMOS gate and aMNOS gate, forming a gate protection layer, etching a second Ge layer, forming Ge steps at positions of the PMOS gate and the NMOS gate, growing an Si0.5Ge0.5 layer, removing the gate protection layer, using the ion implantation technology to form a PMOS source drain electrode and an NMOS source drain electrode, depositing metal to form a contact area and finally forming a CMOS device. The preparation method for the CMOS using the direct band gap Ge as a groove realizes Ge modification, increases a carrier mobility of the CMOS device and has an advantage of monolithic photoelectric integration.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a direct bandgap Ge channel CMOS integrated device and a preparation method thereof. Background technique [0002] The traditional silicon-based CMOS (Complementary Metal-Oxide-Semiconductor Transistor) technology occupies a dominant position in the field of integrated circuits due to its advantages of low power consumption, low noise, high input impedance, high integration, and good reliability, and continues to develop in accordance with Moore's Law. forward development. However, with the development of semiconductor micro-nano processing technology, when the feature size of the device gradually enters the nanometer level, further reducing the size of the transistor faces more and more problems and challenges, such as serious heat dissipation, high power consumption of electrical interconnection, parasitic RC leads to problems such as a decrease in transmission spe...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/8238H01L27/092H01L29/10H01L29/16
Inventor 包文涛宋建军刘伟峰胡辉勇宣荣喜张鹤鸣
Owner XIDIAN UNIV