Direct band gap ge channel cmos integrated device and its preparation method
A technology for integrating devices and channels, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc.
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Embodiment 1
[0078] See figure 1 , figure 1 A process flow chart of a direct bandgap Ge channel CMOS integrated device provided by an embodiment of the present invention. The method comprises the steps of:
[0079] Step a, select Si substrate;
[0080] Step b, growing a first Ge layer on the surface of the Si substrate;
[0081] Step c, growing a second Ge layer on the surface of the first Ge layer;
[0082] Step d, forming shallow trench isolation in the second Ge layer;
[0083] Step e, implanting B ions into a specific region of the second Ge layer to form an NMOS active region;
[0084] Step f, growing a gate dielectric layer and a gate layer continuously on the surface of the second Ge layer, and etching the gate dielectric layer and the gate layer by a selective etching process to form a PMOS gate and an NMOS gate
[0085] Step g, forming a gate protection layer on the surface of the PMOS gate and the NMOS gate;
[0086] Step h, etching the second Ge layer, forming Ge steps at...
Embodiment 2
[0111] See Figure 3a-Figure 3z , Figure 3a-Figure 3z The process schematic diagram of a direct bandgap Ge channel CMOS integrated device provided by the embodiment of the present invention, on the basis of the above embodiments, this embodiment will introduce the process flow of the present invention in more detail. The method includes:
[0112] S101, substrate selection: such as Figure 3a As shown, an N-type silicon (Si) substrate 001 is selected as the initial material, and the surface is cleaned to remove the protective layer and impurities.
[0113] S102. Two-step growth of germanium epitaxial layer:
[0114] S1021. Using a chemical vapor deposition (CVD) method, grow an n-type Ge(001) thin film on the substrate by a two-step method of low and high temperature, with a doping concentration of 1 to 5×10 16 cm -3 ;
[0115] S1022, such as Figure 3b As shown, a 50 nm-thick "low temperature" Ge ((LT-Ge) film 002 was grown at 275–325 °C. Most of the relaxation of elas...
Embodiment 3
[0148] See Figure 3z , a kind of direct bandgap Ge channel CMOS integrated device that the embodiment of the present invention provides, comprises: Si substrate layer, first Ge layer, second Ge layer and Si 0.5 Ge 0.5 layer, GeO 2 Passivation layer, HfO 2 A gate dielectric layer and a TaN gate layer; wherein, the direct bandgap Ge channel CMOS integrated device is prepared and formed by the method described in the above embodiment.
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