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Method and device for raising word line of SRAM array

A memory array, static random access technology, applied in the semiconductor field, can solve the problems of large layout area and complex control

Active Publication Date: 2021-01-15
SPREADTRUM COMM (SHANGHAI) CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, the word line voltage raising technology used in the SRAM writing operation in the prior art has the problems of complex control and large layout area.

Method used

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  • Method and device for raising word line of SRAM array
  • Method and device for raising word line of SRAM array
  • Method and device for raising word line of SRAM array

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Embodiment Construction

[0028] figure 1 The structure of a SRAM cell in the prior art is shown. Such as figure 1 As shown, the SRAM unit includes PMOS transistor ML0, PMOS transistor ML1, NMOS transistor MPG0, NMOS transistor MPG1, NMOS transistor MPD1 and NMOS transistor MPD2. Wherein, when the node N1 is a high voltage, that is, the power supply voltage VDD, and the voltage of the node N0 is a low voltage, that is, the ground voltage VSS, the value stored in the SRAM unit is called a logic 1, otherwise, the value stored in the RAM unit is a logic 0.

[0029] When it is necessary to rewrite the information stored in the SRAM unit, such as rewriting the value stored in it from 1 to 0, the operation to be performed is: Prime Minister, charge the word line WL to a high voltage, that is, the power supply voltage VDD, and charge the bit line of the SRAM unit The voltage of BL is pulled down from the power supply voltage VDD to the ground voltage VSS, and at the same time, the voltage of the bit line BL...

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Abstract

The invention relates to a word line uplifting method of a static random access memory array as well as an apparatus thereof. The method comprises the following steps: obtaining information of a selected static random access memory unit; when whiting operation is carried out, the word lines on the selected static random access memory unit are uplifted to a preset power voltage, and emptying a corresponding first bit line and a second bit line; when the preset time before writing operation is completed is arrived, pre-charging the first bit line and the second bit line of other static random access memory units having a same array with the selected static random access memory unit, and coupling the word lines of the selected static random access memory unit to a preset high electrical level. The above scheme can easily realize uplifting of the word line voltage of the SRAM unit while whiting operation is carried out, and reduces the area occupied by the SRAM storage array.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a word line raising method and device for a SRAM array. Background technique [0002] Static Random Access Memory (SRAM) unit is a kind of memory with static access function, which can save the data stored in it without refresh circuit. With the development of integrated circuit technology, the increase of process deviation and the decrease of power supply voltage make it more and more difficult for SRAM cells to be written, that is, the data stored in SRAM cells is difficult to be modified. [0003] In order to solve the above-mentioned write operation problem, a large number of new technologies have appeared in the prior art, among which word line voltage boost (WL Boost) is a technology widely used at present. [0004] However, the word line voltage raising technology used in the writing operation of the SRAM in the prior art has the problems of complex control and lar...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C11/419G11C8/08G11C7/10G11C5/02
Inventor 王林
Owner SPREADTRUM COMM (SHANGHAI) CO LTD