Processor and method for executing instructions on the processor

Abstract

The present application discloses processors and methods for executing instructions on the processors. A specific embodiment of the processor includes: a host interaction device, an instruction control device, an off-chip memory, an on-chip cache, and an array processor, wherein: the host interaction device is used to interact with the host connected to the processor Data and instructions, wherein the data to be interacted with is at the granularity of a matrix; the off-chip memory is used to store the matrix received from the host and to perform matrix operations; the instruction control device is used to convert the The external instructions received by the host are converted into a series of memory access instructions and a series of calculation instructions, and the converted instructions are executed. This embodiment can improve the execution efficiency of the deep learning algorithm.

Description

technical field [0001] The present application relates to the technical field of computers, in particular to the technical field of processors, and in particular to a processor and a method for executing instructions on the processor. Background technique [0002] At present, in the field of artificial intelligence computing, central processing units and graphics processing units are widely used. Although the latter can provide greater computing power than the former, both hardware are general-purpose processors based on fine-grained instruction streams. Their architectures have the following things in common: one instruction in the fine-grained instruction stream only completes addition, The most basic calculation operations such as multiplication and memory access; the fine-grained arithmetic logic unit in the processor, one unit generally performs a multiplication and addition calculation; the memory access mode and general-purpose data path that supports fine-grained acc...

AI Technical Summary

Problems solved by technology

[0003] Among these processors in the prior art, the fine-grained instruction stream, arithmetic logic unit, general-purpose memory access mode, and data path are not efficient for specific applications such as artificial intelligence.

Fine-grained instruction streams and arithmetic logic units, on the one hand, data needs to be frequently loaded and stored, and the efficiency is low; for artificial intelligence applications, the general architecture has a lot of redundant circuit logic, which leads to complex system design and circuit resource consumption Many, the total cost is relatively high

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