Multi-value adiabatic phase inverter based on transmission gate structure

Abstract

The invention discloses a multi-value adiabatic phase inverter based on a transmission gate structure. The multi-value adiabatic phase inverter comprises a transmission gate control circuit and a multi-value adiabatic logic circuit. The transmission gate control circuit comprises a first PMOS transistor, a second PMOS transistor, a third PMOS transistor, a fourth PMOS transistor, a first NMOS transistor, a second NMOS transistor, a third NMOS transistor, a fourth NMOS transistor and a two-input AND gate. The two-input AND gate is equipped with a first input end, a second input end and an output end. The multi-value adiabatic logic circuit comprises a fifth NMOS transistor, a sixth NMOS transistor, a seventh NMOS transistor, an eighth NMOS transistor, a ninth NMOS transistor, a tenth NMOS transistor, a fifth PMOS transistor, a sixth PMOS transistor, a seventh PMOS transistor, an eighth PMOS transistor, a ninth PMOS transistor, a tenth PMOS transistor and three binary phase inverters. The multi-value adiabatic phase inverter has the advantages that no threshold loss exists, an output data error is avoided, the reliability is relatively high, and the power consumption is relatively low.

Description

technical field [0001] The invention relates to an inverter, in particular to a multi-valued adiabatic inverter based on a transmission gate structure. Background technique [0002] Most of the traditional CMOS integrated circuits are powered by DC power supply, and the energy is always consumed at one time from the power supply → capacitor → ground. Although the power consumption of CMOS integrated circuits can be reduced by reducing power supply voltage and node capacitance, reducing switch redundancy jumps, etc., the power consumption savings are limited. The adiabatic CMOS circuit uses an AC pulse power supply to drive the circuit, and uses the inductance in the power supply and the node capacitance in the circuit to form an LC oscillation circuit, so that the energy transmission is power supply→capacitor→power supply, so that the charge injected into the circuit node capacitance is repeated. use, energy recovery is achieved, thereby achieving a significant reduction in...

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Problems solved by technology

However, the multi-valued adiabatic inverter has the following problems: 1. In the assignment stage, the power clock signal Φ 1 When assigning a value to the output terminal out through two-stage NMOS transistors (M7 and M8), or assigning a value to the inverting output terminal outb through two-stage NMOS transistors (M9 and M10), due to the inevitable threshold loss of the two-stage NMOS transistors, it is easy to The signal deviation of the outpu

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