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Arithmetic addition mask to Boolean xor mask protection circuit

A technology of turning Boolean difference and arithmetic addition, which is applied to the countermeasures of attacking encryption mechanisms, electrical components, digital transmission systems, etc., can solve the problems of high complexity of Boolean masks, large occupied area, small occupied area, etc., to improve execution Efficiency, reduced circuit area and cost, and reduced complexity

Inactive Publication Date: 2018-02-13
成都三零嘉微电子有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0009] In order to overcome the above-mentioned shortcomings of the prior art, the present invention proposes a combinational logic conversion circuit that is easy to implement and occupies a small area, and effectively converts the arithmetic addition mask into a Boolean XOR mask, solving the problem of arithmetic addition in the prior art. Transforming into a Boolean mask has high complexity and occupies a large area

Method used

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  • Arithmetic addition mask to Boolean xor mask protection circuit
  • Arithmetic addition mask to Boolean xor mask protection circuit
  • Arithmetic addition mask to Boolean xor mask protection circuit

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Embodiment Construction

[0015] From the perspective of digital circuit design, the present invention proposes a circuit for converting arithmetic addition into a Boolean mask. A conversion circuit structure is built by using a simple gate circuit. The specific circuit structure is as follows: figure 1 shown. The specific idea is as follows: Assume that A is the sensitive data that needs to be masked, and M is the mask. When implementing a boolean mask, let When implementing an additive mask, let Q=A+M mod 2 n -1,C out For carry, there is Q=(A+M)mod 2 n -1

[0016] =(C out *2 n )+(A+M)mod 2 n )) mod 2 n -1

[0017] =(C out +(A+M)mod 2 n )) mod 2 n -1

[0018] =(A+M)+C out mod 2 n

[0019] A, M, T, Q are all n-bit data, expressed as

[0020] A=(a n-1 a n-2 ...a 1 a 0 )

[0021] M=(m n-1 m n-2 ... m 1 m 0 )

[0022] T=(t n-1 t n-2 ...t 1 t 0 )

[0023] Q=(q n-1 q n-2 ....q 1 q 0 )

[0024] where a i ,m i ,t i ,q i ∈GF(2), i=0,1,...n-1, C out for carry

[0025...

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Abstract

The invention discloses an arithmetic addition mask to Boolean xor mask protection circuit. It is assumed that A is sensitive data needing to be masked, M is a random number mask, and input signals are T and M. The circuit is formed in the following mode that the T is connected with a first not gate and an input end of a parallel prefix adder; the M is connected with a second not gate and then isconnected with the other input end of the parallel prefix adder; every level of carry output of the parallel prefix adder and the output of the first not gate are connected with an xor gate; the xor gate outputs a final result A(+)M.. The protection circuit only comprises simply combined logic circuits. Logic conversion is realized in parallel; the complexity of the circuit is reduced; and the circuit area and cost are effectively reduced. According to the circuit, the principle of the parallel prefix adder is applied to a conversion circuit, so the performance efficiency of the circuit can beeffectively improved. According to the protection circuit, the secure logic conversion without leaking a median value is realized, so an energy analysis attack and electromagnetic analysis attack ofside channels can be effectively resisted.

Description

technical field [0001] The present invention relates to energy and electromagnetic attack protection technology and circuit design technology, in particular to a protection circuit for converting an arithmetic addition mask into a Boolean XOR mask. In the case of no energy leakage, the arithmetic mask is converted into a Boolean mask, The energy consumption leaked in the data conversion process has no dependence on the sensitive intermediate value, which effectively protects the energy leakage and electromagnetic leakage of sensitive information. The logic structure is simple and the occupied area is small. At the same time, the circuit can be applied in the field of chip security protection. Background technique [0002] Side-channel attack technology uses bypass signals leaked by cryptographic devices during operation, such as time, electromagnetic, power consumption, etc. These signals are all information leaked by cryptographic devices during operation. The attack method ...

Claims

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Application Information

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IPC IPC(8): H04L9/00
CPCH04L9/002H04L2209/12
Inventor 李军饶金涛何卫国
Owner 成都三零嘉微电子有限公司
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