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Method and device for 32-bit cpu to access memory space larger than 4gb

A memory management unit and storage component technology, applied in memory address/allocation/relocation, memory systems, instruments, etc., can solve problems such as access difficulties and increased FTL access delays

Active Publication Date: 2021-12-14
BEIJING STARBLAZE TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

While the address bus and / or data bus is difficult for a 32-bit CPU to access more than 4GB of memory space
[0014] Moreover, when the size of the FTL entry changes, it will further increase the access delay of the FTL

Method used

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  • Method and device for 32-bit cpu to access memory space larger than 4gb

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Embodiment Construction

[0059] figure 1 is a block diagram of circuitry according to an embodiment of the invention. The CPU 110 is coupled with a main memory 130 such as a DRAM to form a circuit system. The CPU 110 accesses the main memory (130) through a memory management unit (MMU, Memory Management Unit). The CPU provides virtual addresses to the MMU 120, and the MMU 120 translates the virtual addresses into physical addresses, and uses the physical addresses to access the main memory 130. As an example, the virtual address provided by the CPU 110 is 32 bits, while the physical address provided by the MMU 120 is 40 bits. The width of the physical address is related to the size of the main memory 130 . Optionally, MMU 120 accesses main memory 130 via bus 140 . Still optionally, the MMU 120 is also coupled to a TLB 150 (Translation Lookside Buffer). The TLB 150 is used to cache the correspondence between virtual addresses and physical addresses.

[0060] FTL tables are stored in main memory. ...

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PUM

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Abstract

A method and a device for accessing a memory space larger than 4GB by a 32-bit CPU are provided. The disclosed method for accessing an FTL table includes: obtaining the logical address of the IO command in response to receiving the IO command; calculating the virtual address and the physical address of an entry in the FTL table corresponding to the logical address according to the logical address; The address sets a memory management unit (MMU); and the entry of the FTL table is accessed through the memory management unit using a virtual address.

Description

technical field [0001] The present invention relates to a storage device controller, in particular to a method and a device for using a 32-bit CPU in the storage device controller to access a memory space greater than 4GB through an MMU (Memory Management Unit) Background technique [0002] In a solid state storage device (Solid State Drive, SSD), FTL (Flash Translation Layer, Flash Translation Layer) is used to maintain mapping information from logical addresses to physical addresses. The logical address constitutes the storage space of the solid-state storage device perceived by the upper layer software such as the operating system. A physical address is an address used to access a physical storage unit of a solid-state storage device. In the prior art, an intermediate address form can also be used to implement address mapping. For example, a logical address is mapped to an intermediate address, and the intermediate address is further mapped to a physical address. [00...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F12/02
CPCG06F12/0238G06F12/0292
Inventor 丁胜涛陈亮徐晓画
Owner BEIJING STARBLAZE TECH CO LTD