Semiconductor device packaging structure
A device packaging and semiconductor technology, applied in semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc., can solve problems such as separation
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[0022] Spatial descriptions such as "above", "below", "top", "left", "right", "bottom", "top", "bottom", "vertical", "horizontal", "side", " Higher, "lower", "upper", "lower", "above", "below", etc., describe a definite element or group of elements, or a definite element or group of elements plane for component orientation as shown in the associated drawings. It should be understood that the spatial illustrations used herein are for illustration purposes only, and that embodiments of structures described herein may be spatially arranged in any orientation or manner, and that the advantages of the embodiments of the present invention are not deviating from such an arrangement .
[0023] Figure 1A is a perspective view of a semiconductor device package 1 according to some embodiments of the present invention. The semiconductor device package 1 includes a carrier 10, a cover 11, chips 12 and 13, a solder resist layer 15, cavities A and B, and a space C.
[0024] The carrier 1...
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