Convolution acceleration and calculation processing method, device, electronic equipment and storage medium

Abstract

The embodiment of the present invention discloses a convolution acceleration and calculation processing method, device, electronic equipment, and storage medium, wherein the acceleration method includes: sequentially reading the preset size of the task to be processed from the off-chip memory of the accelerator through the FIFO port The data to be processed is stored in each input buffer area of ​​the first buffer area in the on-chip memory of the accelerator; in response to storing the data to be processed in the input buffer area, the input window to be processed is read from each input buffer area in turn data, and perform convolution calculation on the input window data to be processed through the convolution kernel data, obtain the output window data and store it in the third buffer area; sequentially convert the output window in the third buffer area through the FIFO port Data is stored in the off-chip memory. The embodiment of the present invention can avoid the situation of insufficient memory and bandwidth on the accelerator chip, and limited processor resources, and improves the efficiency of convolution calculation processing, and can be applied to hardware platforms such as FPGA and ASIC.

Description

technical field [0001] The present invention relates to computer vision technology, especially a convolution acceleration and calculation processing method, device, electronic equipment and storage medium. Background technique [0002] As an information processing technology imitating biological neural structure, neural network has developed rapidly in recent years. Neural networks have very powerful nonlinear mapping capabilities. Among them, Deep convolutional neural network (CNN) has shown remarkable performance in various computer vision tasks such as image classification, object detection, and semantic segmentation. [0003] Due to the need to process the feature map of the region in the image, the computational complexity of CNN increases exponentially. For the huge computing pressure, hardware accelerators such as Graphics Processing Unit (GPU), Field Programmable Gate Array (Field Programmable Gate Array, FPGA), and Application Specific Integrated Circuit (ASIC) are...

AI Technical Summary

Problems solved by technology

[0003] Due to the need to process the feature map of the region in the image, the calculation accuracy of CNN is improved, and its computational complexity is also doubled.

Images