NAND operation circuit for memory area calculation, memory chip and computer

A computing circuit and memory chip technology, which is applied in the field of memory chips, computers, and non-computing circuits for memory area calculations, can solve problems such as long running time and low CPU running speed, and achieve increased computing bandwidth, higher running speed, and improved Calculate the effect of density

Active Publication Date: 2018-09-28
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] In view of this, the present invention provides a kind of NAND calculation circuit of memory area calculation, to solve the problem of low running speed and long running time of CPU in the prior art

Method used

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  • NAND operation circuit for memory area calculation, memory chip and computer
  • NAND operation circuit for memory area calculation, memory chip and computer
  • NAND operation circuit for memory area calculation, memory chip and computer

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Embodiment Construction

[0038] As mentioned in the background art section, during the running process of the CPU, the running speed of the computer in the prior art is low, and the running time and output time are relatively long.

[0039] The inventors have found that the reason for the above phenomenon is that the memory in the prior art computer only has the function of temporarily storing data, but does not have the function of computing. When data operations are required, the data temporarily stored in the memory must be transmitted to the ALU of the CPU over a long distance, and then logic operations are performed. The data can only be transmitted to the ALU for calculation after long-distance transmission, which results in a longer running time of the CPU and a lower operating speed, which in turn leads to a longer time for outputting results.

[0040] Based on this, the present application provides a NAND operation circuit for memory area calculation, including:

[0041] A sequentially conne...

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Abstract

The invention provides an NAND operation circuit for memory area calculation, a memory chip and a computer. The NAND operation circuit for memory area calculation comprises a bit line pre-charging circuit, a storage array and a reverse-phase structure, which are connected in sequence; and the NAND operation circuit is located in a memory of the computer to ensure that the memory has a NAND operation function and then NAND operation of data can be completed in the memory, thereby avoiding the long-distance transmission, between the memory and an ALU, of the data needing NAND operation, improving the operation speed, in a CPU, of the data needing NAND operation, shorting a part of the data processing time of the CPU, namely, shortening the operation time of the CPU, improving the calculationdensity and calculation bandwidth, and realizing the operation by using a single memory process.

Description

technical field [0001] The invention relates to the intersection field of memory and processor, in particular to an NAND operation circuit for memory area calculation, a memory chip and a computer. Background technique [0002] Memory plays an important role in the computer, and all programs in the computer run in the memory. Memory (Memory), also known as internal memory, is used to temporarily store computing data in the central processing unit (CPU, Central Processing Unit) and exchange data with external memories such as hard disks. [0003] When the computer is running, the CPU sends commands to the memory, and the data that needs to be calculated is called out from the memory to the execution unit of the CPU - the arithmetic logic unit (ALU, Arithmetic and Logic Unit), and then the logic operation is performed. When the operation is completed After that, the CPU transmits the operation result again. [0004] Since the data to be calculated is read from the memory to ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C16/24G11C16/08G11C16/30H03K19/20
CPCG11C16/08G11C16/24G11C16/30H03K19/20
Inventor 陈巍巍陈岚尤云霞王家蕊
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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