A High Linearity Time Amplifier with Power Supply Rejection
A time amplifier and high linearity technology, applied in the electronic field, can solve the problems of limiting the working efficiency of the input signal circuit, severe nonlinearity, and restricting the promotion.
Active Publication Date: 2020-07-07
NO 24 RES INST OF CETC
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Problems solved by technology
On the one hand, the structure adopts the method of controlling the discharge time of the node capacitor by the input signal, and the length of the node discharge time will limit the holding time of the input signal, especially in the application with a large amplification factor, which seriously limits the working efficiency of the input signal generating circuit; on the other hand On the one hand, the time amplifier of this structure uses resistors for discharge, and the nonlinearity is very serious, which seriously restricts the promotion of TA in high linearity application environments.
In addition, the threshold voltage of the over-threshold detector of the traditional time amplifier varies greatly with the fluctuation of the power supply voltage, which seriously affects the performance of the amplifier
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[0034] Embodiments of the present invention are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various modifications or changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that, in the case of no conflict, the following embodiments and features in the embodiments can be combined with each other.
[0035] It should be noted that the diagrams provided in the following embodiments are only schematically illustrating the basic ideas of the present invention, and only the components related to the present invention are shown in the diagrams rather than the number, shape and shape of the components in ...
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The invention provides a high-linearity time amplifier with power supply suppression. In the reset stage, the threshold value of the over-threshold detector is used to reset the output node of the amplifier, and the influence of power supply voltage changes on the threshold value of the over-threshold detector is eliminated. Through the input clock The signal control charges the node capacitance unit. After charging, the node capacitance unit is controlled by a synchronous clock signal to discharge. The time amplification gain in the present invention is only related to the charge and discharge current ratio, and the charge and discharge time is completely linear in principle. In principle, the non-linear problem of traditional time amplifiers is eliminated, and the negative impact of threshold changes on system performance is reduced. The present invention uses an input clock to control the charging process, completes input signal sampling during the charging process, and uses a synchronous clock to control the discharging process. It isolates the input signal from the discharge process, eliminates the limitation of the discharge process on the working rate of the input signal generation circuit, and improves the overall performance of the system through multi-channel time interleaving.
Description
technical field [0001] The invention relates to the field of electronics, in particular to a high-linearity time amplifier with power supply suppression. Background technique [0002] A Time Amplifier (TA for short) is a device that amplifies the time difference between electronic signals and can amplify the time delay. It is often used for time amplification after a Voltage to Time Converter (VTC for short), or time The converter (Time to Digital Converter, referred to as TDC) increases the input signal range of the front stage. [0003] At present, traditional time amplifiers usually use resistors to charge and discharge capacitors, and the TA magnification is designed by designing the ratio of charge and discharge resistors. On the one hand, the structure adopts the method of controlling the discharge time of the node capacitor by the input signal, and the length of the node discharge time will limit the holding time of the input signal, especially in the application wit...
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IPC IPC(8): H03F1/02H03F3/45H03K17/22H03K17/28
CPCH03F1/0211H03F3/45H03K17/22H03K17/28H03F3/45179H03F1/3211
Inventor 黄正波李婷张勇倪亚波王健安付东兵
Owner NO 24 RES INST OF CETC