A circuit, electronic device and implementation method of clamping inverter puf
An inverter and clamping technology, which is applied in the field of electronic devices and clamped inverter PUF circuits, can solve problems such as poor circuit stability, and achieve the effects of low cost, low power consumption, and data theft prevention.
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[0026] The present invention will be further described below in conjunction with the accompanying drawings. The following examples are only used to illustrate the technical solution of the present invention more clearly, but not to limit the protection scope of the present invention.
[0027] Such as figure 1 As shown: this embodiment discloses a circuit of clamping inverter PUF, including linear feedback shift registers, PUF cores and output enhancement verification devices connected in series, and the PUF cores include sequentially connected first-stage inverters The phase group, the second-stage inverter group and the third-stage inverter group, the first-stage inverter group and the second-stage inverter group all include M parallel inverter blocks, and each inverter block consists of 2 multiplexers and 2 N an inverter, the third-stage inverter group includes several parallel inverters, the output enhancement verification device includes an output stage and a fourth stag...
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