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Method for producing an association list

A technology of signals and registers, applied in the field of creating allocation lists, which can solve the problems of complex and difficult to handle models of controlled systems

Active Publication Date: 2018-11-09
디스페이스게엠베하
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The model of the controlled system is becoming more and more complex based on the increased precision requirements and thus also difficult to handle

Method used

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  • Method for producing an association list
  • Method for producing an association list
  • Method for producing an association list

Examples

Experimental program
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Embodiment Construction

[0056] figure 1 A graphical FPGA source code 1 is shown comprising two subsystems 10, 11 nested within each other. The first subsystem 10 includes a first logic block 13 and a second logic block 14 . The first logic block 13 includes two input signals 14 , 15 and a first output signal 2 . A first register 3 is assigned to the first output signal 2 . The first register 3 serves for this purpose to store the value of the first output signal 2 during operation and to allow this value to be read during operation.

[0057] The first subsystem 10 is embedded in the second subsystem 11 . The first output signal 4 of the first subsystem 10 is identical to the first output signal 2 of the first logic block 13 within the first subsystem 10 . This is recognized when creating the assignment list and the first register 3 in the first subsystem 10 is assigned to the first output signal 4 of the first subsystem. As an allocation rule between the first output signal 4 of the first subsys...

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Abstract

Method for producing an association list, wherein the association list is produced based on an FPGA source code, wherein the source code uses at least one first signal at a first location, wherein thefirst signal has at least one associated first register, wherein the association list shows the first signal and the first register as associated with one another, wherein a second signal at a secondlocation is used in the FPGA source code, wherein it is automatically detected that the value of the second signal can be determined from the value of the first signal using a first computation rule,wherein the association list shows the second signal, the first register and the first computation rule as associated with one another.

Description

technical field [0001] The invention relates to a method for creating an assignment list. Background technique [0002] Real-time simulation of complex dynamic models places high demands on modern computing nodes based on constrained temporal edge conditions. In automotive hardware-in-the-loop (HiL), such models are mainly used where fast control loops must be closed. This is the case, for example, with simulated cylinder internal pressure sensors, which are playing an increasing role in reducing consumption or exhaust emissions. But in controlled systems with high dynamics, such as in electric motors, short cycle times and low delays are essential. This is difficult to achieve in practice with CPU-based emulation. [0003] Field Programmable Gate Arrays (FPGAs) can assist computing nodes in real-time simulations by performing calculations for the dynamic parts of the model. Due to the high flexibility and the possibility to process signals in parallel, hard real-time re...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/50
CPCG06F30/331G06F30/333G06F30/34G06F30/327G06F9/30101G06F11/3612
Inventor H·卡尔特D·卢贝雷
Owner 디스페이스게엠베하