Single bimetallic plate encapsulation structure and encapsulation method thereof

Abstract

The invention discloses a single bimetallic plate encapsulation structure and an encapsulation method. The single bimetal plate encapsulation structure comprises a first circuit layer; A second wiringlayer electrically connected to the first wiring layer and forming at least one cavity with the first wiring layer; A first solder resist layer is superposed under the first line layer, and the firstsolder resist layer is provided with a plurality of window regions. A second solder resist layer and an upper metal plate sequentially disposed on the outer wall surface of the second line layer; Aninjection molding hole arranged on the single bimetallic plate packaging structure and communicated with the inside of the cavity; A first chip and / or a second chip located within the cavity; The fenestrated area of the first solder resist layer is implanted to communicate solder balls of the first wiring layer, and plastic injection filling cavities and injection holes. The invention connects thewiring to the surface or the interior of the injection plastic by using a bimetallic plate for packaging, thereby realizing the stacked packaging more conveniently, and the invention does not need touse a traditional mold with a cavity for plastic packaging, thereby saving the manufacturing cost.

Description

Technical field [0001] The invention belongs to the field of semiconductor manufacturing, and in particular relates to a single bimetal plate packaging structure and packaging method. Background technique [0002] With the trend of multifunction and miniaturization of electronic products, high-density microelectronic assembly technology has gradually become the mainstream in the new generation of electronic products. In order to cope with the development of new generation electronic products, especially the development of smart phones, handheld computers, ultrabooks and other products, integrated circuit packaging has also developed in the direction of miniaturization, high density, high power, and high speed. Stack packaging is precisely the Developed in response to its high-density needs. [0003] POP package is a typical semiconductor stack package. In the field of logic circuit and memory, it has been regarded as the industry's first choice, mainly used in the manufacture of a...

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Problems solved by technology

[0004] However, in the above-mentioned method, in the existing POP manufacturing process, it is necessary to groove the plastic package and form interconnection solder balls by solder printing, the manufacturing process is complicated, and the cost is relatively high.

[0005] PiP package is also a very typical semiconductor stacked package. It stacks multiple semiconductor chips in a single package to achieve the purpose of miniaturization and high density. However, when several semiconductor chips are stacked, the upper chip often requires It is smaller than the lower chip, otherwise the upper chip will be pressed to the bonding wire on the lower chip, which will affect the signal transmission of the lower chip

In order to solve this problem, the industry has proposed a stacked package in which copper pillars are set on the substrate to realize the support and signal transmission of the upper chip. However, this structure has relatively high requirements for the upper chip and can only be flip chip, and its Copper pillars with a certain height must be electroplated on the substrate first during manufacture, the manufacturing procedure is more complicated and the production cost is higher

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