Shift register, driving method thereof and gate driving circuit

A shift register and gate technology, applied in static memory, digital memory information, instruments, etc., can solve the problems of insufficient discharge of the shift register, short charging time, and abnormal display of the display panel.

Active Publication Date: 2018-12-18
HEFEI XINSHENG OPTOELECTRONICS TECH CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, with the gradual development of high refresh rate (Gaming) products, the charging time of each row of pixels is less and less, and the corresponding shift register is not fully discharged, resulting in the shift register not working normally, and eventually the display panel cannot be displayed normally.

Method used

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  • Shift register, driving method thereof and gate driving circuit
  • Shift register, driving method thereof and gate driving circuit
  • Shift register, driving method thereof and gate driving circuit

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0054] The first embodiment of the present invention provides a shift register, such as figure 1 As shown, it includes: an input module 101, an output module 102, a reset module 103 and a reset control module 104;

[0055] The input module 101 is respectively connected to the signal input terminal INPUT and the pull-up node PU, and is used for writing the voltage of the signal input terminal INPUT to the pull-up node PU under the control of the voltage of the signal input terminal INPUT;

[0056] The output module 102 is respectively connected to the first clock signal terminal CLKA, the pull-up node PU, and the signal output terminal OUTPUT, and is used to write the voltage of the first clock signal terminal CLKA to the signal output terminal under the control of the voltage of the pull-up node PU OUTPUT, and keep the voltage difference between the pull-up node PU and the signal output terminal OUTPUT stable when the pull-up node PU is in a floating state;

[0057] The reset module ...

Embodiment 2

[0085] The second embodiment of the present invention provides a shift register, such as Figure 5 As shown, it includes: an input module 101, an output module 102, a reset module 103, a reset control module 104, a pull-down control module 105, and a pull-down module 106;

[0086] The input module 101 is respectively connected to the signal input terminal INPUT and the pull-up node PU, and is used for writing the voltage of the signal input terminal INPUT to the pull-up node PU under the control of the voltage of the signal input terminal INPUT;

[0087] The output module 102 is respectively connected to the first clock signal terminal CLKA, the pull-up node PU, and the signal output terminal OUTPUT, and is used to write the voltage of the first clock signal terminal CLKA to the signal output terminal under the control of the voltage of the pull-up node PU OUTPUT, and keep the voltage difference between the pull-up node PU and the signal output terminal OUTPUT stable when the pull-u...

Embodiment 3

[0120] Based on the same inventive concept, the third embodiment of the present invention provides a gate driving circuit. Since the principle of the gate driving circuit to solve the problem is similar to that of the above-mentioned shift register, the third embodiment of the present invention provides the For the implementation of the gate driving circuit, reference may be made to the implementation of the above-mentioned shift register provided in the first and second embodiments of the present invention, and the repetitive parts will not be repeated.

[0121] Specifically, the gate driving circuit provided in the third embodiment of the present invention, such as Picture 9 As shown, it includes a plurality of cascaded shift registers provided in Embodiment 1 or 2 of the present invention;

[0122] The signal input terminal INPUT of the first stage shift register A1 is connected to the frame trigger signal terminal STA;

[0123] Except for the shift register A1 of the first stag...

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PUM

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Abstract

The invention discloses a shift register, a driving method thereof and a gate driving circuit. The shift register comprises an input module, an output module, a resetting module and a resetting control module. Through a first resetting signal end and a second resetting signal end, a control signal is output to the resetting control module for realizing control to voltage of a resetting node, thereby randomly expanding the working time length of the resetting module through controlling by voltage of the resetting node. Therefore the discharging capability of the shift register is effectively improved.

Description

Technical field [0001] The present invention relates to the field of display technology, in particular to a shift register, a driving method thereof, and a gate driving circuit. Background technique [0002] With the rapid development of display technology, display panels are increasingly developing towards high integration and low cost. Among them, the array substrate row drive (Gate Driver on Array, GOA) technology integrates the thin film transistor (Thin Film Transistor, TFT) gate switch circuit on the array substrate of the display panel to form a scan drive for the display panel, so that the gate can be omitted. The wiring space of the bonding (Bonding) area and the fan-out (Fan-out) area of ​​the integrated circuit (Integrated Circuit, IC) can not only reduce the product cost in terms of material cost and manufacturing process, but also enable the display panel to achieve The beautiful design of symmetrical on both sides and narrow frame; and, this integrated process can ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G09G3/20G11C19/28
CPCG09G3/20G09G2310/0286G11C19/28
Inventor 熊雄贺之洋邹宜峰张晓哲刘玉东
Owner HEFEI XINSHENG OPTOELECTRONICS TECH CO LTD
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