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A clock synchronization method and synchronization system

A clock synchronization and clock technology, which is used in time division multiplexing systems, electrical components, multiplexing communications, etc.

Active Publication Date: 2018-12-18
HANGZHOU CHENXIAO TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] However, at present, clock synchronization is usually achieved through the locked mode. After the clock of the upstream network element fails and becomes invalid, the clocks of all downstream network elements cannot be synchronized.

Method used

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  • A clock synchronization method and synchronization system
  • A clock synchronization method and synchronization system

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Embodiment Construction

[0044] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with specific embodiments of the present invention and corresponding drawings. Apparently, the described embodiments are only some of the embodiments of the present invention, but not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0045] figure 1 It is a flowchart of a clock synchronization method in an exemplary embodiment of the present invention. Such as figure 1 As shown, the method may include:

[0046] S1: Perform time stamp sampling based on an input clock source on the line, and generate a first clock source by self-oscillating on the line.

[0047] Wherein, step S1 may include:...

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Abstract

The invention discloses a clock synchronization method and a synchronization system, belonging to the technical field of clock synchronization. The method includes: timestamping the input clock sourceon the line, and generating a first clock source by self-oscillation on the line, monitoring the input clock source and judged whether the input clock source is valid, If yes, storing the resulting timestamp samples in the lock clock buffer, restoring a timestamp in the locked clock buffer to a second clock source, and based on the pre-design-time cycle, reading the latest timestamp sample and storing in the hold clock buffer, if invalid, restoring the timestamp in the hold clock buffer to the third clock source, so that the third clock source can be selected as the output clock source in theabsence of the second clock source, so that the current line can still have a valid output clock source. The clock synchronization method of the invention improves the reliability of the clock synchronization on the circuit through the redundancy design.

Description

technical field [0001] The present invention relates to the technical field of clock synchronization, in particular to a clock synchronization method and a synchronization system. Background technique [0002] In a synchronous system, clock synchronization between network elements needs to be achieved. It is required that the downstream network element can realize clock synchronization with the upstream network element, that is, the upstream provides a reliable clock source, and the downstream can restore a clock with the characteristics of the clock source through a certain algorithm. Currently, clock synchronization between network elements is implemented through a clock locking mode. [0003] However, at present, clock synchronization is usually implemented through a locked mode. When the clock of an upstream network element fails and becomes invalid, the clocks of all downstream network elements cannot synchronize time. Contents of the invention [0004] In order to ...

Claims

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Application Information

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IPC IPC(8): H04J3/06
CPCH04J3/0661
Inventor 徐林涛吴双崔涛乔义松陈奇强
Owner HANGZHOU CHENXIAO TECH