A processor debugging method for extracting fault field feature test excitation

A technology of feature testing and debugging methods, which is applied in the direction of response to error generation, error detection/correction, and electrical digital data processing. It can solve problems such as short time spent and uncertain specific time, and achieve the effect of reducing time and energy.

CN109101355AActive Publication Date: 2018-12-28PHYTIUM TECH CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Publication Date
2018-12-28

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Abstract

The invention discloses a processor debugging method for extracting error field characteristic test excitation. The method comprises executing the original test excitation and records the original execution data stream in the running environment; according to the information of the designated suspected error instruction, searching the original execution data stream to obtain the hot instruction and obtaining the hot instruction list; the hot instruction list being analyzed one by one to retrieve the register information that the instruction depends on; searching data corresponding to all dependency information of all hot-spot instructions in the original execution data stream; converting hot instructions and corresponding dependency data into test code and compiling to generate executablefeature test excitation; running feature test incentives in the test environment, recording the running status of running feature test incentives or using debugging methods for debugging. The invention reduces the time for finding error points and reproducing errors in the debugging process by automatically extracting characteristic test incentives from the original incentives through a given flowand information, thereby reducing the time and energy spent in the whole debugging process.
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Description

technical field

[0001] The invention relates to debugging technology in verification test in microprocessor design, in particular to a processor debugging method for extracting error field feature test excitation. Background technique

[0002] Testing is an essential process in microprocessors, and as much testing as possible must be done to ensure the correctness of the processor design. The earlier the defect is found, the lower the cost of repairing the defect, and the higher the value of the test. The lower the number of defects found through the complete test, the higher the design quality. To solve the found defects, the designer must analyze the test incentives, and it is even more necessary to re-site the error when debugging.

[0003] As the project advances, the design will become more and more mature, and a large number of various tests will be performed during integration testing. The stimuli used in these tests are mainly some directional functional test stimu...

Examples

Embodiment Construction

[0055] Such as figure 1 As shown, the implementation steps of the processor debugging method for extracting error field feature test incentives in this embodiment include:

[0056] 1) Execute the original test stimulus in the running environment, record the original execution data flow OrgTrace of the original test stimulus in the running environment processor, and the original execution data flow OrgTrace records the machine code of each instruction executed and the registers affected; Determine the original execution data stream OrgTrace query start suspected error instruction position Ns;

[0057] 2) According to the information of the specified suspected wrong instruction, start from the initial instruction position Ns to find the instruction matching the information in the original execution data stream OrgTrace to obtain the hot instruction, and obtain the hot instruction list HotList;

[0058] 3) Analyze the hot instruction information in the hot instruction list HotLi...