a sat solver

A solver and a technology to be solved, applied in the computer field, can solve problems such as low processing efficiency, and achieve the effects of high processing efficiency, high reliability, and high solving efficiency

Active Publication Date: 2021-10-19
何安平 +2
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  • Abstract
  • Description
  • Claims
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Problems solved by technology

[0005] The purpose of the present invention is to provide a SAT solver for the above defects, to solve the problem of low processing efficiency in the existing software-based SAT solver in the prior art, and to achieve the effect of improving processing efficiency

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[0032] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with specific embodiments of the present invention and corresponding drawings. Apparently, the described embodiments are only some of the embodiments of the present invention, but not all of them. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0033] The present invention design selects Field Programmable Gate Array (FPGA) technology to solve the SAT problem. In recent years, FPGA has developed rapidly, and FPGA chips with a scale of 100 million logic gates have appeared, and their computing power is sufficient to deal with actual SAT applications. Therefore, the use of FPGA technology to develop SAT de...

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Abstract

The invention discloses a SAT solver, comprising: a two-way transmission chain module (102), used for two-way transmission of variables to be solved; an implication circuit module (104), used for providing implied values ​​for the variables to be solved; conflict detection Module (106), for detecting whether the current assignment of the assignment module (108) will cause conflict; assignment module (108), for assigning a value to the variable to be solved, and its output value is determined by the state machine of the variable to be solved The current state of and the input signal of the assignment input are jointly determined. The solution of the present invention can solve the problem of low processing efficiency of the SAT solver based on software in the prior art, and achieve the effect of improving the processing efficiency.

Description

technical field [0001] The invention belongs to the technical field of computers, in particular to a SAT solver, in particular to an FPGA-based asynchronous SAT solver. Background technique [0002] The Boolean satisfiability problem is the first proven NP problem (that is, a non-deterministic problem that can be solved by a polynomial algorithm). The method of solving this problem has important applications in many fields of computer science, such as model checking, computer systems Structural design, logical reasoning, integrated circuit design and artificial intelligence, etc. [0003] Theoretically speaking, the SAT problem (that is, the Boolean satisfiability problem) is used to judge whether there is a set of satisfying solutions for the Boolean logic formula, that is, a set of assignments that can make the Boolean formula value true. Therefore, practical problems need to be converted into Boolean formulas before they can be solved using SAT problem solving methods an...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F30/331G06F30/3323G06N5/00
CPCG06F30/3323G06F30/33G06N5/01
Inventor 何安平余旅莹李鹏飞张吉霖冉学斌张海涛吴尽昭
Owner 何安平
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