Semiconductor memory device

Abstract

Semiconductor memory devices are provided. A semiconductor memory device includes a substrate. The semiconductor memory device includes a plurality of memory cell transistors vertically stacked on thesubstrate. The semiconductor memory device includes a first conductive line connected to a source region of at least one of the plurality of memory cell transistors. The semiconductor memory device includes a second conductive line connected to a plurality of gate electrodes of the plurality of memory cell transistors. Moreover, the semiconductor memory device includes a data storage element connected to a drain region of the at least one of the plurality of memory cell transistors.

Description

technical field [0001] The present disclosure relates to semiconductor devices, and more particularly, to highly integrated three-dimensional semiconductor memory devices. Background technique [0002] Higher integration of semiconductor devices can be used to meet consumer demands for superior performance and low price. In the case of semiconductor devices, increased integration is particularly desirable since their integration can be an important factor in determining product prices. In the case of two-dimensional or planar semiconductor devices, since their integration is mainly determined by the area occupied by a unit memory cell, integration is greatly affected by the level of fine pattern formation technology. However, the expensive process equipment used to increase the fineness of the pattern sets a practical limit to increase the integration of two-dimensional or planar semiconductor devices. In order to overcome such limitations, three-dimensional semiconductor ...

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Problems solved by technology

However, the expensive process equipment used to increase the pattern fineness sets practical limits to improve the integration of two-dimensional or planar semiconductor devices.

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