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GPU vertex coloring task scheduling method based on SystemC

A technology of task scheduling and vertex coloring, which is applied in the direction of program startup/switching, resource allocation, program control design, etc., can solve time-consuming and labor-intensive problems, and achieve the effect of solving function verification and speeding up

Active Publication Date: 2019-04-23
XIAN AVIATION COMPUTING TECH RES INST OF AVIATION IND CORP OF CHINA
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Problems solved by technology

When the design is expressed as a system-level model, it is easy to use different algorithms to try the design multiple times, and it can be quickly completed by switching to different structures; if the register-transfer-level or gate-level model is used To express the design, the scale is usually quite large, and it is time-consuming, if not too difficult, to experiment with different design structures or make some changes

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  • GPU vertex coloring task scheduling method based on SystemC

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Embodiment Construction

[0038] A method for scheduling GPU vertex coloring tasks based on SystemC, comprising:

[0039] Step 1: Initialize the function. If there is data in the graphics drawing FIFO, output it to the graphics drawing module 2 through the transaction level interface, and jump to step 2; otherwise, if the graphics function code enable variable glFunCodeEnable is enabled, then use the transaction level interface Output to function code processing module 3, and jump to step 3; otherwise, if the debug mode DebugMode is enabled, output to debugging module 4 through the transaction level interface, and jump to step 4; otherwise, execute step 1 in a loop;

[0040] Step 2: Execute the processing and scheduling of graphics drawing commands in simple mode and complex mode;

[0041] Step 3: Execute the processing and scheduling of graphic function codes;

[0042] Step 4: Perform data processing and scheduling in debug mode.

[0043] Described step 1 is characterized in that:

[0044] Graphic ...

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Abstract

The invention relates to the technical field of computer hardware modeling, and provides a GPU vertex coloring task scheduling method based on SystemC, which comprises the following steps of 1, initializing a function, outputting data to a graph drawing module (2) through a transaction-level interface if data exist in a graph drawing FIFO, and skipping to a step 2; otherwise, if the graphical function code enabling variable glFunCodeEnable is enabled, outputting the graphical function code enabling variable glFunCodeEnable to the function code processing module (3) through the transaction level interface, and skipping to the step 3; otherwise, if the debugging mode DebugMode is in the enabling state, outputting the debugging mode DebugMode to a debugging module (4) through a transaction-level interface, and skipping to the step 4; otherwise, circularly executing the step 1; step 2, executing processing and scheduling of the graph drawing command in a simple mode and a complex mode; step 3, executing processing and scheduling of the graphic function code; and 4, executing data processing and scheduling in the debugging mode.

Description

technical field [0001] The invention relates to the technical field of computer hardware modeling, in particular to a SystemC-oriented GPU vertex coloring task scheduling method. Background technique [0002] With the continuous increase of graphics applications, the early solution of graphics rendering by CPU alone has been difficult to meet the graphics processing needs of performance and technology growth, and the graphics processing unit (Graphic Processing Unit, GPU) came into being. Since the release of the first GPU product by Nvidia in 1999, the development of GPU technology has mainly gone through the fixed-function pipeline stage, the stage of separating the dyer architecture, and the stage of unified dyer architecture. Rendering gradually extends to the field of general computing. The high-speed, parallel features and flexible programmability of the GPU pipeline provide a good operating platform for graphics processing and general parallel computing. [0003] At...

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Application Information

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IPC IPC(8): G06F9/48G06F9/50G06T1/20
CPCG06F9/4843G06F9/5027G06T1/20
Inventor 姜丽云吴晓成韩立敏张少锋楼晓强陈佳
Owner XIAN AVIATION COMPUTING TECH RES INST OF AVIATION IND CORP OF CHINA