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Bufferable limit device

A technology of a limit device and a buffer part, which is applied to measuring devices, parts of electrical measuring instruments, and electronic circuit testing, etc., can solve problems such as wear and tear, and achieve the effects of prolonging life and reducing wear and tear

Pending Publication Date: 2019-05-03
吴俊杰
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The guide edge 13 is beveled so that when the robot arm places the chip in the middle of the chip holder 12, the guide chip will fall into the correct position. Therefore, the guide edge 13 on the chip holder 12 is often hit by the chip Impact will cause wear and tear, even collapse, causing the chip holder 12 and the leading edge 13 to be replaced frequently
[0006] Since semiconductor technology is priced by quantity, every stoppage will cause losses. Therefore, how to improve the service life of the chip holder 12 and the leading edge 13 and avoid losses caused by stoppages is an urgent goal for relevant technical personnel.

Method used

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Embodiment Construction

[0052] The characteristics and technical contents of the relevant patent applications of the present invention will be clearly presented in the following detailed description of the seven preferred embodiments with reference to the drawings. Before proceeding with the detailed description, it should be noted that like elements are denoted by the same reference numerals.

[0053] refer to figure 2 , 3 , 4, 5 are a first preferred embodiment of a cushionable limiting device of the present invention, which is suitable for limiting the position of a chip A on a test seat B, and the first preferred embodiment includes a chip A limiting unit 31 , a chip buffer unit 32 , and an outer frame fixing unit 33 .

[0054] The lower surface of the chip A has a plurality of pins, and the upper surface of the test socket B has a plurality of test electrodes, and the multiple pins of the chip A and the multiple test electrodes of the test socket B are in contact with each other to transmit p...

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PUM

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Abstract

The invention provides a bufferable limit device and is suitable for limiting the position of a chip on a test stand. The device includes a chip limit unit and a chip buffer unit, wherein the chip limit unit includes a limit portion surrounding a first receiving space to limit the position of the chip to the test stand, the buffer unit includes a buffer portion disposed between the test stand andthe chip limit unit, the buffer portion has elasticity, and the buffer portion can buffer the impact of the chip on the limit portion when the chip is placed in the first receiving space.

Description

technical field [0001] The invention relates to a limiting device, in particular to a limiting device which limits the position of a chip on a test seat and can buffer the placement force of the chip. Background technique [0002] After the wafer (Wafer) is produced from the semiconductor factory, it will be cut into multiple chips (Chip) and packaged. Generally, the package will be processed by wire drawing and glue filling to form a chip with multiple pins (electrodes). [0003] The colloid used in the glue filling process is in a liquid state, but there is still a chance that the lead wire will fall off or break when the colloid impacts the lead wire. Therefore, an electrical test will be performed after the semiconductor packaging process to select good chips. [0004] refer to figure 1 , is a chip testing device, comprising a test seat 11, and a chip seat 12 detachably arranged on the test seat 11. This chip seat 12 is provided with a guide edge 13, and the shape of t...

Claims

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Application Information

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IPC IPC(8): G01R31/28G01R1/02
Inventor 吴俊杰
Owner 吴俊杰