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Data writing and reading method of a multi-substrate memory based on triple modular redundancy

A three-mode redundancy, memory technology, applied in the field of memory, can solve problems such as abnormal substrates and access errors, and achieve the effect of improving security and reliability

Active Publication Date: 2019-05-10
SHANDONG INST OF AEROSPACE ELECTRONICS TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0007] In view of this, the purpose of the present invention is to provide a data writing and reading method based on triple-mode redundant multi-chip memory, which can solve the problem of access errors caused by abnormality of a certain substrate in the multi-chip memory

Method used

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  • Data writing and reading method of a multi-substrate memory based on triple modular redundancy
  • Data writing and reading method of a multi-substrate memory based on triple modular redundancy

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Embodiment

[0031] Take 4 substrates with 8-bit data line width to form an integrated memory with 32-bit data line width as an example. The software writes and reads 32-bit target data to three addresses in the memory respectively. The target data is 0x44332211 as an example, set m=32, n=8, K=4, L=0, M=1, N=2.

[0032] In the first step, write the target data to the first address. The target data 0x44332211 is distributed as follows: 0x44 is stored in substrate 4, 0x33 is stored in substrate 3, 0x22 is stored in substrate 2, and 0x11 is stored in substrate 1.

[0033] In the second step, the target data is rotated right by 8 bits first, and the shifted target data is written into the second address. The target data is 0x11443322 after shifting, and the distribution is as follows: 0x44 is stored in substrate 3, 0x33 is stored in substrate 2, 0x22 is stored in substrate 1, and 0x11 is stored in substrate 4.

[0034] In the third step, firstly, the target data is cyclically shifted right ...

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Abstract

The invention discloses a data writing and reading method of a multi-substrate memory based on triple modular redundancy, which comprises the following steps of: combining the triple modular redundancy with the multi-substrate memory, and adding a shifting operation into a writing operation of the triple modular redundancy by utilizing the characteristics of the multi-substrate memory, so that different fragments of spliced data are stored in a single substrate; then adding a shift operation into the triple modular redundancy read operation, the shift direction being opposite to the write operation so as to recover the spliced data; when a part of substrates in the multi-substrate memory go wrong, different fragments of the spliced data are stored in a single substrate, so that errors of the same data fragment are avoided, the problem of failure of the whole memory caused by failure of a certain substrate in the multi-substrate memory can be solved through a triple-modular redundancy technology, and the safety and reliability of target data are effectively improved.

Description

technical field [0001] The invention belongs to the technical field of memory, and in particular relates to a data writing and reading method of a multi-substrate memory based on triple-mode redundancy. Background technique [0002] Triple Modular Redundancy (TMR, Triple Modular Redundancy) is currently the mainstream anti-SEU reinforcement design method. The basic principle is to design three repeated circuit modules or units, and compare their outputs to determine the correct output value, so that even if there are One module fails, but the whole circuit still works fine. [0003] In order to meet the needs of different tasks, it is generally used in computers to splice memories (called substrates) with smaller bit widths (called data segments, such as 8-bit data lines) into larger bit widths (called spliced ​​data, Such as 32-bit data line) memory design method; or use multiple small-bit-width industrial-grade memories as substrates, and package them into a large-bit-wid...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C29/44H03K19/003
Inventor 赵磊伍攀峰刘庆民张毅韩德崇王勇
Owner SHANDONG INST OF AEROSPACE ELECTRONICS TECH